Process for forming semiconductor device with thick and thin films

Claim 2

A process for forming a semiconductor device comprising the steps of: forming a first gate dielectric layer over a semiconductor device substrate; patterning a resist layer to expose a portion of the first gate dielectric layer; removing the exposed portion of the first gate dielectric layer to expose a surface portion of the semiconductor device substrate and to form a remaining portion of the first gate dielectric layer; forming a native oxide layer over the exposed surface portion of the semiconductor device substrate; removing the resist layer; performing a pre-gate clean on the semiconductor device substrate without using fluorine-containing solutions such that the remaining portion of the first gate dielectric layer and the native oxide layer are not etched by the pre-gate clean, wherein the pre-gate clean comprises at least one cleaning solution comprising hydrogen peroxide; and forming a second gate dielectric layer overlying the exposed surface portion of the semiconductor device substrate, wherein the native oxide layer and the remaining portion of the first gate dielectric layer are not etched prior to forming the second gate dielectric lay.

Claim 3

The process of claim 1 , wherein a thickness of the first gate dielectric layer is less than approximately 15 nanometers.

Claim 4

The process of claim 1 , wherein the first gate dielectric layer is formed using a thermal oxidation process.

Claim 5

The process of claim 1 , wherein the first gate dielectric layer includes nitrogen.

Claim 6

The process of claim 1 , wherein the step of removing the exposed portion of the first gate dielectric layer is performed using a process selected from a group consisting of a spray tool, submersion and plasma etch.

Claim 7

The process of claim 1 , wherein the step of removing the exposed portion of the first gate dielectric layer includes using a fluorine-containing solution.

Claim 8

The process of claim 1 , wherein the step of performing the pre-gate clean comprises the steps of: exposing the semiconductor device substrate to a solution of sulfuric acid and hydrogen peroxide; exposing the semiconductor device substrate to a solution of ammonium hydroxide and hydrogen peroxide; and exposing the semiconductor device substrate to a solution of hydrochloric acid and hydrogen peroxide.

Claim 9

The process of claim 1 , wherein a thickness of the second gate dielectric layer is less than approximately 8.0 nanometers.

Claim 10

The process of claim 1 , wherein the second gate dielectric layer is formed using a thermal oxidation process.

Claim 11

The process of claim 1 , wherein the second gate dielectric layer includes nitrogen.

Claim 12

The process of claim 1 , wherein the second gate dielectric layer has a second thickness and the first gate dielectric layer has a first thickness and the first thickness is greater than the second thickness.

Claim 13

The process of claim 1 , wherein the step of forming the first gate dielectric layer comprises the steps of: forming a first portion of the first gate dielectric layer; annealing the first portion; and forming a second portion of the first gate dielectric layer.

Claim 14

A process for forming a semiconductor device comprising the steps of: forming a first gate dielectric layer over a semiconductor device substrate; patting a resist layer to expose a portion of the first gate dielectric layer; removing a portion of the first dielectric layer to expose a surface portion of the semiconductor device substrate and to form a remaining portion of the first gate dielectric layer; forming an oxide layer over the exposed surface portion of the semiconductor device substrate; removing the resist layer; performing a pre-gate clean on the semiconductor device substrate without using a fluorine-containing solution after removing the resist layer and prior to forming a second gate dielectric layer such that the remaining portion of the first gate dielectric and the oxide layer are not etched by the pre-gate clean, wherein the pre-gate clean comprises at least on cleaning solution comprising hydrogen peroxide; and forming the second gate dielectric layer overlying the exposed surface portion of the semiconductor device substrate, wherein the remaining portion of the first gate dielectric layer and the oxide layer are not etched prior to forming the second gate dielectric layer.

Claim 15

A process for forming a semiconductor device comprising the steps of: forming a first gate dielectric layer over a semiconductor device substrate; patting a resist layer to expose a portion of the first gate dielectric layer; removing a portion of the first dielectric layer to expose a surface portion of the semiconductor device substrate and to form a remaining portion of the first gate dielectric layer; forming an oxide layer over the exposed surface portion of the semiconductor device substrate; removing the resist layer; performing a pre-gate clean on the semiconductor device substrate without using a fluorine-containing solution after removing the resist layer and prior to forming a second gate dielectric layer such that the remaining portion of the first gate dielectric and the oxide layer are not etched by the pre-gate clean, wherein the pre-gate clean comprises at least on cleaning solution comprising hydrogen peroxide; and forming the second gate dielectric layer overlying the exposed surface portion of the semiconductor device substrate, wherein the remaining portion of the first gate dielectric layer and the oxide layer are not etched prior to forming the second gate dielectric layer.

Claim 16

The process of claim 13 , wherein the step of performing the pre-gate clean comprises the steps of: exposing the semiconductor device substrate to a solution of sulfuric acid and hydrogen peroxide; exposing the semiconductor device substrate to a solution of ammonium hydroxide and hydrogen peroxide; and exposing the semiconductor device substrate to a solution of hydrochloric acid and hydrogen peroxide.

Claim 17

The process of claim 13 , wherein a thickness of the first gate dielectric layer is less than approximately 15 nanometers.

Claim 18

The process of claim 13 , wherein a thickness of the second gate dielectric layer is less than approximately 8.0 nanometers.

Claim 19

The process of claim 13 , wherein the second gate dielectric layer has a second thickness and the first gate dielectric layer has a first thickness, wherein the first thickness is greater than the second thickness.

Claim 20

The process of claim 13 , wherein the first and second gate dielectric layers are formed using a thermal oxidation process.

Claim 21

A process for forming a semiconductor device comprising: forming a first gate dielectric layer over a semiconductor device substrate; patterning a resist layer to expose a portion of the first gate dielectric layer; removing the exposed portion of the first gate dielectric layer to expose a surface portion of the semiconductor device substrate and to form a remaining portion of the first gate dielectric layer; forming a native oxide layer over the exposed surface portion of the semiconductor device substrate, removing the resist layer; performing a pre-gate clean on the semiconductor device substrate after removing the resist layer and prior to forming a second gate dielectric layer, wherein solutions used to perform the the pre-gate clean are devoid of fluorine-containing solutions and the the pre-gate clean sequentially includes: exposing the semiconductor device substrate to a solution of sulfuric acid and hydrogen peroxide; exposing the semiconductor device substrate to a solution of ammonium hydroxide and hydrogen peroxide; exposing the semiconductor device substrate to a solution of hydrochloric acid and hydrogen peroxide, so that the remaining portion of the first gate dielectric layer and the native oxide layer are not etched by the pre-gate clean; and forming the second gate dielectric layer overlying the exposed surface portion of the semiconductor device substrate, wherein the native oxide layer and the portion of the first gate dielectric layer are not etched prior to forming the second gate dielectric layer and a thickness of the first gate dielectric layer and a thickness of the second gate dielectric layer are different.

Claim 22

A process for forming a semiconductor device comprising: forming a first gate dielectric layer over a semiconductor device substrate; patterning a resist layer to expose a portion of the first gate dielectric layer; removing the exposed portion of the first gate dielectric layer to expose a surface portion of the semiconductor device substrate and to form a remaining portion of the first gate dielectric layer; forming a native oxide layer over the exposed surface portion of the semiconductor device substrate, removing the resist layer; performing a pre-gate clean on the semiconductor device substrate after removing the resist layer and prior to forming a second gate dielectric layer, wherein solutions used to perform the the pre-gate clean are devoid of fluorine-containing solutions and the the pre-gate clean sequentially includes: exposing the semiconductor device substrate to a solution of sulfuric acid and hydrogen peroxide; exposing the semiconductor device substrate to a solution of ammonium hydroxide and hydrogen peroxide; exposing the semiconductor device substrate to a solution of hydrochloric acid and hydrogen peroxide, so that the remaining portion of the first gate dielectric layer and the native oxide layer are not etched by the pre-gate clean; and forming the second gate dielectric layer overlying the exposed surface portion of the semiconductor device substrate, wherein the native oxide layer and the portion of the first gate dielectric layer are not etched prior to forming the second gate dielectric layer and a thickness of the first gate dielectric layer and a thickness of the second gate dielectric layer are different.