US6232188B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
CMP-free disposable gate process
Assignee: Texas Instruments Inc
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Filing: 1998-07-29
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Granted: 2001-05-15
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Expires: 2018-07-29
Abstract
Abstract A method for forming a MOSFET transistor using a disposable gate process which has no need for a chemical mechanical polishing step to expose the disposable gate after deposition of the field dielectric. The field dielectric is deposited non-conformally by HDP-CVD over a disposable gate structure so that the disposable gate remains partially exposed. After deposition, the partially exposed disposable gate may then be removed by selective isotropic etch. In the space left by the removal of the disposable gate, the gate dielectric may be formed and the gate electrode may be deposited. Eliminating the need for exposure of the disposable gate by CMP eliminates the problem of polish rate dependence on gate pattern density.
Inventors
- 👤 Suhail Murtaza
- 👤 Amitava Chatterjee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0275; H10D64/00; H10D64/01; H10D64/017; H10P; H10P14/00; H10P14/40; H10P14/42; H10P14/43; H10P14/432
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
103 words
A fabrication method, comprising the steps of: (a.) forming a disposable gate over a sacrificial gate dielectric over a semiconductor active area; (b.) forming source/drain regions adjacent to said disposable gate; (c.) depositing a dielectric material non-conformally over said source/drain regions and said disposable gate, while leaving portions of said disposable gate exposed, wherein a height of said dielectric material over said source/drain regions is less than a height of said disposable gate; (d.) selectively removing said disposable gate, without removing said dielectric material above said source/drain regions; and (e.) forming a conductive gate electrode in the space left by said disposable gate.
Claim 2
Dependent Claim
103 words
A fabrication method, comprising the steps of: (a.) forming a disposable gate over a sacrificial gate dielectric over a semiconductor active area; (b.) forming source/drain regions adjacent to said disposable gate; (c.) depositing a dielectric material non-conformally over said source/drain regions and said disposable gate, while leaving portions of said disposable gate exposed, wherein a height of said dielectric material over said source/drain regions is less than a height of said disposable gate; (d.) selectively removing said disposable gate, without removing said dielectric material above said source/drain regions; and (e.) forming a conductive gate electrode in the space left by said disposable gate.
Claim 3
Dependent Claim
22 words
The fabrication method of claim 1 , wherein said step (c.) comprises the sub-step of: (c1.) depositing said dielectric material by high-density-plasma-chemical-vapor-deposition.
Claim 4
Dependent Claim
34 words
The fabrication method of claim 1 , wherein said step (c.) comprises the sub-step of: (c2.) removing any of said dielectric material from the sides of said disposable gate by a short isotropic etch.
Claim 5
Dependent Claim
25 words
The fabrication method of claim 1 , wherein the material comprising said semiconductor active area is selected from the group consisting of silicon and silicon-germanium.
Claim 6
Dependent Claim
26 words
The fabrication method of claim 1 , wherein said disposable gate comprises a material selected from the group consisting of silicon, silicon-germanium, polysilicon, and silicon nitride.
Claim 7
Dependent Claim
26 words
The fabrication method of claim 1 , wherein said sacrificial gate dielectric comprises a material selected from the group consisting of silicon dioxide and silicon germanium.
Claim 8
Dependent Claim
21 words
The fabrication method of claim 1 , wherein said step (b.) comprises the sub-step of: (b1.) forming an elevated source/drain region.
Claim 9
Dependent Claim
22 words
The fabrication method of claim 7 , further comprising the step of: diffusing dopant from said elevated source/drain region into said substrate.
Claim 10
Dependent Claim
37 words
The fabrication method of claim 1 , further comprising the step of performing a self-aligned introduction of channel dopants after said step of forming said source/drain region and prior to said step of forming a gate electrode.
Claim 11
Dependent Claim
38 words
The fabrication method of claim 1 , wherein said step (e.) comprises the sub-step of: (e1.) removing said sacrificial gate dielectric; and (e2.) forming a gate dielectric in the space left by removal of said sacrificial gate dielectric.
Claim 12
Dependent Claim
16 words
The method of claim 1 , further comprising the step of: (f.) cladding said gate electrode.
Claim 13
Dependent Claim
115 words
A fabrication method, comprising the steps of: (a.) forming a disposable gate over a sacrificial gate dielectric over a sericonductor active area of a substrate; (b.) forming source/drain regions adjacent to said disposable gate; (c.) depositing a dielectric layer non-conformally over said source/drain regions and said disposable gate, wherein a height of said dielectric layer over said source/drain regions is less than a height of said disposable gate; (d.) removing said disposable gate by selective isotropic etch and removing said sacrificial gate dielectric by selective isotropic etch; (e.) growing a gate dielectric in the space left by said disposable gate and said sacrifcial gate dielectric; and (f.) forming a gate electrode over said gate dielectric.
Claim 14
Dependent Claim
115 words
A fabrication method, comprising the steps of: (a.) forming a disposable gate over a sacrificial gate dielectric over a sericonductor active area of a substrate; (b.) forming source/drain regions adjacent to said disposable gate; (c.) depositing a dielectric layer non-conformally over said source/drain regions and said disposable gate, wherein a height of said dielectric layer over said source/drain regions is less than a height of said disposable gate; (d.) removing said disposable gate by selective isotropic etch and removing said sacrificial gate dielectric by selective isotropic etch; (e.) growing a gate dielectric in the space left by said disposable gate and said sacrifcial gate dielectric; and (f.) forming a gate electrode over said gate dielectric.
Claim 15
Dependent Claim
29 words
The method of claim 12 , wherein said step (b.) comprises the sub-step of: (b1.) forming elevated source/drain regions by selective epitaxy, using said disposable gate as a mask.
Claim 16
Dependent Claim
38 words
The method of claim 12 , wherein said step (d.) comprises the sub-step of performing a self-aligned introduction of channel dopants into said semiconductor active area after removing said disposable gate but before removing said sacrificial gate dielectric.
Claim 17
Dependent Claim
24 words
The fabrication method of claim 12 , wherein said step (c.) comprises the sub-step of: (c1.) depositing said dielectric layer by high-density-plasma-chemical vapor deposition.
Claim 18
Dependent Claim
16 words
The method of claim 12 , further comprising the step of: (g.) siliciding said gate electrode.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-05-14 | 2004-11-13 | 2005-05-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-05-14 | 2008-11-13 | 2009-05-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-05-14 | 2012-11-13 | 2013-05-15 | $7700.00 | Window Closed / Lapsed |