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US6228749B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing semiconductor device

Assignee: NEC Corp
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Filing: 1998-04-22
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Granted: 2001-05-08
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Expires: 2018-04-22
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Abstract

Abstract In manufacturing a semiconductor device, an amorphous silicon layer with a predetermined thickness to be electrically connected to a silicon substrate is formed on a silicon oxide film formed on the silicon substrate. Nuclei are formed on the surface of the amorphous silicon layer by irradiation of a predetermined material while the amorphous silicon layer is annealed at the first temperature. Convexities are formed on the surface of the amorphous silicon layer using the nuclei as centers while the amorphous silicon layer having the nuclei is annealed at the second temperature lower than the first temperature.

Inventors

  • 👤 Ichiro Yamamoto

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:04
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/712; H10D30/00; H10D30/60; H10D30/68; H10D30/6891

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 119 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an amorphous silicon layer with a predetermined thickness to be electrically connected to a silicon substrate, on a silicon oxide film formed on said silicon substrate; forming a nucleus on a surface of said amorphous silicon layer by irradiation of a predetermined material while annealing said amorphous silicon layer at a first temperature; and forming a convexity on said surface of said amorphous silicon layer using said nucleus as a center by annealing said amorphous silicon layer having said nucleus at a second temperature lower than said first temperature while exposing said surface of said amorphous silicon layer to a gas plasma which is inert to silicon.
Claim 2
Independent Claim 119 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an amorphous silicon layer with a predetermined thickness to be electrically connected to a silicon substrate, on a silicon oxide film formed on said silicon substrate; forming a nucleus on a surface of said amorphous silicon layer by irradiation of a predetermined material while annealing said amorphous silicon layer at a first temperature; and forming a convexity on said surface of said amorphous silicon layer using said nucleus as a center by annealing said amorphous silicon layer having said nucleus at a second temperature lower than said first temperature while exposing said surface of said amorphous silicon layer to a gas plasma which is inert to silicon.
Claim 3
Dependent Claim 60 words
A method according to claim 1 , wherein the step of forming said amorphous silicon layer comprises the steps of: forming a contact hole in said silicon oxide film so as to reach said silicon substrate; and forming said amorphous silicon layer with a predetermined thickness above said contact hole and on said silicon oxide film around the contact hole.
Claim 4
Dependent Claim 29 words
A method according to claim 1 , wherein the convexity formed on said surface of said amorphous silicon layer has one of a hemispherical shape or a mushroom-like shape.
Claim 5
Dependent Claim 20 words
A method according to claim 1 , wherein the gas plasma inert to silicon is an argon or nitrogen plasma.
Claim 6
Dependent Claim 18 words
A method according to claim 1 , wherein the first temperature is set to 550 to 570° C.
Claim 7
Dependent Claim 23 words
A method according to claim 1 , wherein the second temperature is set lower by 10 to 70° C. than the first temperature.
Claim 8
Independent Claim 114 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an amorphous silicon layer with a predetermined thickness to be electrically connected to a silicon substrate, on a silicon oxide film formed on said silicon substrate; forming a nucleus on a surface of said amorphous silicon layer by irradiation of a predetermined material while annealing said amorphous silicon layer at a first temperature; and forming a convexity on said surface of said amorphous silicon layer using said nucleus as a center by annealing said amorphous silicon layer having said nucleus at a second temperature lower than the first temperature while irradiating said surface of said amorphous silicon layer with an ion beam.
Claim 9
Independent Claim 114 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an amorphous silicon layer with a predetermined thickness to be electrically connected to a silicon substrate, on a silicon oxide film formed on said silicon substrate; forming a nucleus on a surface of said amorphous silicon layer by irradiation of a predetermined material while annealing said amorphous silicon layer at a first temperature; and forming a convexity on said surface of said amorphous silicon layer using said nucleus as a center by annealing said amorphous silicon layer having said nucleus at a second temperature lower than the first temperature while irradiating said surface of said amorphous silicon layer with an ion beam.
Claim 10
Independent Claim 114 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an amorphous silicon layer with a predetermined thickness to be electrically connected to a silicon substrate, on a silicon oxide film formed on said silicon substrate; forming a nucleus on a surface of said amorphous silicon layer by irradiation of a predetermined material while annealing said amorphous silicon layer at a first temperature; and forming a convexity on said surface of said amorphous silicon layer using said nucleus as a center by annealing said amorphous silicon layer having said nucleus at a second temperature lower than the first temperature while irradiating said surface of said amorphous silicon layer with an electron beam.
Claim 11
Independent Claim 114 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an amorphous silicon layer with a predetermined thickness to be electrically connected to a silicon substrate, on a silicon oxide film formed on said silicon substrate; forming a nucleus on a surface of said amorphous silicon layer by irradiation of a predetermined material while annealing said amorphous silicon layer at a first temperature; and forming a convexity on said surface of said amorphous silicon layer using said nucleus as a center by annealing said amorphous silicon layer having said nucleus at a second temperature lower than the first temperature while irradiating said surface of said amorphous silicon layer with an electron beam.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-05-07 2004-11-06 2005-05-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-05-07 2008-11-06 2009-05-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-05-07 2012-11-06 2013-05-08 $7700.00 Window Closed / Lapsed

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