US6201302B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor package having multi-dies
Assignee: Amkor Technology Singapore Holding Pte Ltd
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Filing: 1998-12-31
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Granted: 2001-03-13
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Expires: 2018-12-31
Abstract
Abstract The package includes a substrate having an opening. A first die is mounted on the upper surface of the substrate. A second die is attached on the lower surface of the first die by epoxy. The first die is encapsulated by mold compound. A plurality of solder balls are mounted on the substrate to establish a thermal and electrical connection. The modified embodiment is also possible to use a conductive plate between the first and second dies. A further embodiment includes a multi-layer substrate. Apertures are respectively formed in the layers of the substrate and are enlarged from the layer under the uppermost layer to the lowermost layer. A first die is attached on the top surface of the uppermost layer of the multi-layer substrate and is electrically connected to the conductive traces by using bonding wires. A second die is attached on the lower surface of the uppermost layer of the substrate. Mold compound covers the first die and a cap is attached to the lower surface of the multi-layer substrate. Solder balls are arranged on the lower surface of the multi-layer substrate for communicating with external modules.
Inventors
- 👤 Chung-Hsing Tzu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 16:03
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/117; H10W40/00; H10W40/70; H10W40/77; H10W40/778; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W70/681; H10W70/682; H10W70/685; H10W72/00; H10W72/071; H10W72/073; H10W72/07351; H10W72/07352; H10W72/30; H10W72/321; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/732; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
174 words
A structure of a semiconductor package, said structure comprising: a substrate having a first surface and a second surface, said substrate having an opening being formed in said substrate; a first semiconductor die formed on said first surface of said substrate and over said opening; a second semiconductor die attached on a lower surface of said first semiconductor die and positioned in said opening; solder bumps coupled to said first and second dies via a plurality of bonding wires, wherein said solder bumps are arranged on said second surface of said substrate; and a first cover formed on said first surface of said substrate to protect said first die; and a second cover formed on said second surface of said substrate to protect said second die wherein said first semiconductor die is coupled to said first surface of said substrate via a first group of said plurality of bonding wires and said second semiconductor die is coupled to said second surface of said substrate via a second group of said plurality of bonding wires.
Claim 2
Dependent Claim
174 words
A structure of a semiconductor package, said structure comprising: a substrate having a first surface and a second surface, said substrate having an opening being formed in said substrate; a first semiconductor die formed on said first surface of said substrate and over said opening; a second semiconductor die attached on a lower surface of said first semiconductor die and positioned in said opening; solder bumps coupled to said first and second dies via a plurality of bonding wires, wherein said solder bumps are arranged on said second surface of said substrate; and a first cover formed on said first surface of said substrate to protect said first die; and a second cover formed on said second surface of said substrate to protect said second die wherein said first semiconductor die is coupled to said first surface of said substrate via a first group of said plurality of bonding wires and said second semiconductor die is coupled to said second surface of said substrate via a second group of said plurality of bonding wires.
Claim 3
Dependent Claim
21 words
The structure of claim 1 , wherein said first semiconductor die is formed on said substrate by using tape or glue.
Claim 4
Dependent Claim
22 words
The structure of claim 1 , further comprising a heat sink formed on the first surface of said substrate to spread heat.
Claim 5
Dependent Claim
25 words
The structure of claim 1 , wherein said second semiconductor die is attached on said lower surface of said first semiconductor die by using epoxy.
Claim 6
Dependent Claim
13 words
The structure of claim 1 , wherein said first cover comprises mold compound.
Claim 7
Dependent Claim
13 words
The structure of claim 1 , wherein said second cover comprises mold compound.
Claim 8
Dependent Claim
185 words
A structure of a semiconductor package, said structure comprising: a substrate having a first surface and a second surface, said substrate having an opening being formed in said substrate; a conductive plate formed on said first surface of said substrate and over said opening; a first semiconductor die formed on a upper surface of said conductive plate; a second semiconductor die formed on a lower surface of said conductive plate and positioned in said opening; solder bumps coupled to said first and second dies via a plurality of bonding wires, wherein said solder bumps are arranged on said second surface of said substrate; and a first cover formed on said first surface of said substrate to protect said first die; and a second cover formed on said second surface of said substrate to protect said second die wherein said first semiconductor die is coupled to said first surface of said substrate via a first group of said plurality of bonding wires and said second semiconductor die is coupled to said second surface of said substrate via a second group of said plurality of bonding wires.
Claim 9
Dependent Claim
185 words
A structure of a semiconductor package, said structure comprising: a substrate having a first surface and a second surface, said substrate having an opening being formed in said substrate; a conductive plate formed on said first surface of said substrate and over said opening; a first semiconductor die formed on a upper surface of said conductive plate; a second semiconductor die formed on a lower surface of said conductive plate and positioned in said opening; solder bumps coupled to said first and second dies via a plurality of bonding wires, wherein said solder bumps are arranged on said second surface of said substrate; and a first cover formed on said first surface of said substrate to protect said first die; and a second cover formed on said second surface of said substrate to protect said second die wherein said first semiconductor die is coupled to said first surface of said substrate via a first group of said plurality of bonding wires and said second semiconductor die is coupled to said second surface of said substrate via a second group of said plurality of bonding wires.
Claim 10
Dependent Claim
14 words
The structure of claim 7 , wherein said conductive plate comprises a copper plate.
Claim 11
Dependent Claim
22 words
The structure of claim 7 , further comprising a heat sink formed on the first surface of said substrate to spread heat.
Claim 12
Dependent Claim
23 words
The structure of claim 1 , wherein said conductive plate is formed on said first surface of said substrate by tape or glue.
Claim 13
Dependent Claim
13 words
The structure of claim 1 , wherein said first cover comprises mold compound.
Claim 14
Dependent Claim
13 words
The structure of claim 1 , wherein said second cover comprises mold compound.
Claim 15
Dependent Claim
198 words
A structure of a semiconductor package, said structure comprising: a multi-layer substrate, each layer of said multi-layer substrate having an aperture formed approximately a center portion of said multi-layer substrate except for a uppermost layer, wherein said aperture of said each layer is enlarged from a layer under said uppermost layer to a lowermost layer, thereby forming a cavity; a first semiconductor die attached on a upper surface of said uppermost layer of said multi-layer substrate; a second semiconductor die in said cavity and attached on a lower surface of said uppermost layer of said multi-layer substrate; a first cover on a upper surface of said multi-layer substrate; a second cover attached to a lower surface of said multi-layer substrate; and solder bumps arranged on said lower surface of said multi-layer substrate for communicating with external modules and electrically connected to said first and second semiconductor dies by bonding wires wherein said first semiconductor die is coupled to said first surface of said substrate via a first group of said plurality of bonding wires and said second semiconductor die is coupled to said second surface of said substrate via a second group of said plurality of bonding wires.
Claim 16
Dependent Claim
198 words
A structure of a semiconductor package, said structure comprising: a multi-layer substrate, each layer of said multi-layer substrate having an aperture formed approximately a center portion of said multi-layer substrate except for a uppermost layer, wherein said aperture of said each layer is enlarged from a layer under said uppermost layer to a lowermost layer, thereby forming a cavity; a first semiconductor die attached on a upper surface of said uppermost layer of said multi-layer substrate; a second semiconductor die in said cavity and attached on a lower surface of said uppermost layer of said multi-layer substrate; a first cover on a upper surface of said multi-layer substrate; a second cover attached to a lower surface of said multi-layer substrate; and solder bumps arranged on said lower surface of said multi-layer substrate for communicating with external modules and electrically connected to said first and second semiconductor dies by bonding wires wherein said first semiconductor die is coupled to said first surface of said substrate via a first group of said plurality of bonding wires and said second semiconductor die is coupled to said second surface of said substrate via a second group of said plurality of bonding wires.
Claim 17
Dependent Claim
21 words
The structure of claim 13 , wherein said first semiconductor die is formed on said substrate by using tape or glue.
Claim 18
Dependent Claim
22 words
The structure of claim 13 , further comprising a heat sink formed on the first surface of said substrate to spread heat.
Claim 19
Dependent Claim
22 words
The structure of claim 13 , wherein said second semiconductor die is attached on said multi-layer substrate by using tape or glue.
Claim 20
Dependent Claim
13 words
The structure of claim 13 , wherein said first cover comprises mold compound.
Claim 21
Dependent Claim
28 words
The structure of claim 13 , wherein said second cover comprises a cap attached on said lower surface of said multi-layer substrate, compound being filled in said cap.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-03-12 | 2004-09-11 | 2005-03-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-03-12 | 2008-09-11 | 2009-03-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-03-12 | 2012-09-11 | 2013-03-13 | $7700.00 | Window Closed / Lapsed |