US6187656B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
CVD-based process for manufacturing stable low-resistivity poly-metal gate electrodes
Assignee: Texas Instruments Inc
•
Filing: 1998-10-07
•
Granted: 2001-02-13
•
Expires: 2018-10-07
Abstract
Abstract A process for forming a W-poly gate stack ( 110 ) comprising the steps of: (1) deposition of doped polysilicon ( 112 ) on a thin dielectric layer ( 108 ) covered substrate ( 102 ), (2) deposition of WNx by a CVD-based process, (3) thermal treatment to covert WNx into thermally stable barrier, WSiNx, ( 114 ) and to remove excess nitrogen and (4) deposition of W layer ( 116 ). The stack layers are then etched to form the gate electrode ( 110 ).
Inventors
- 👤 Jiong Ping Lu
- 👤 Ming Hwang
- 👤 Dirk N. Anderson
- 👤 Jorge A. Kittl
- 👤 Hun-Lian Tsai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 05:42
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/01344; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/01312; H10D64/60; H10D64/66; H10D64/661; H10D64/68; H10D64/693
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
93 words
A method of fabricating an integrated circuit comprising the steps of: forming a dielectric layer over a semiconductor body; forming a silicon layer over the dielectric layer; depositing a metal-nitride layer over the silicon layer using a chemical-vapor-deposition (CVD) process; thermally treating said metal nitride layer to cause said metal nitride layer to react with said silicon layer to form a thermally stable barrier layer; forming a metal layer over said barrier layer; wherein said steps of depositing the metal nitride layer and depositing the metal layer are performed in the same chamber.
Claim 2
Independent Claim
93 words
A method of fabricating an integrated circuit comprising the steps of: forming a dielectric layer over a semiconductor body; forming a silicon layer over the dielectric layer; depositing a metal-nitride layer over the silicon layer using a chemical-vapor-deposition (CVD) process; thermally treating said metal nitride layer to cause said metal nitride layer to react with said silicon layer to form a thermally stable barrier layer; forming a metal layer over said barrier layer; wherein said steps of depositing the metal nitride layer and depositing the metal layer are performed in the same chamber.
Claim 3
Dependent Claim
24 words
The method of claim 1 , further comprising the step of nitridizing said silicon layer prior to the step of depositing said metal-nitride layer.
Claim 4
Dependent Claim
13 words
The method of claim 1 , wherein said metal nitride layer comprises tungsten-nitride.
Claim 5
Dependent Claim
12 words
The method of claim 1 , wherein said metal layer comprises tungsten.
Claim 6
Dependent Claim
13 words
The method of claim 1 , wherein said metal nitride layer comprises molybdenum-nitride.
Claim 7
Dependent Claim
12 words
The method of claim 1 , wherein said metal layer comprises molybendum.
Claim 8
Dependent Claim
13 words
The method of claim 1 , wherein said metal nitride layer comprises tantalum-nitride.
Claim 9
Dependent Claim
12 words
The method of claim 1 , wherein said metal layer comprises tantalum.
Claim 10
Dependent Claim
16 words
The method of claim 1 , wherein said CVD process comprises a plasma enhanced CVD process.
Claim 11
Dependent Claim
15 words
The method of claim 1 , wherein said CVD process comprises a thermal CVD process.
Claim 12
Dependent Claim
14 words
The method of claim 1 , wherein said CVD process comprises a photo-CVD process.
Claim 13
Dependent Claim
52 words
The method of claim 1 , further comprising the steps of: patterning and etching said metal, barrier, and silicon layers to form a gate electrode; and selectively oxidizing said gate electrode and semiconductor body to mitigate etch damage and improve gate oxide integrity, wherein said metal and barrier layers are not oxidized.
Claim 14
Dependent Claim
98 words
The method of claim 1 , wherein said step of forming said metal nitride layer comprises the following process parameters: flowing WF 6 at a rate in the range of 2-10 sccm, flowing H 2 at a rate in the range of 100-2000 sccm, flowing N 2 at a rate in the range of 50-1000 sccm, flowing Ar at a rate in the range of 0-2000 sccm, using a susceptor temperature in the range of 250-500° C., using a reactor pressure in the range of 0.5-10 torr, and using a plasma power in the range of 150-500 watts.
Claim 15
Dependent Claim
72 words
The method of claim 1 , wherein said step of forming said metal nitride layer comprises the following process parameters: WF 6 flow of approximately 3 sccm, N 2 flow of approximately 300 sccm, H 2 flow of approximately 500 sccm, Ar flow of approximately 700 sccm, susceptor temperature of approximately 360° C., reactor pressure of approximately 5 torr, RF power of approximately 375 watt and deposition time of approximately 10 seconds.
Claim 16
Dependent Claim
41 words
The method of claim 1 , wherein said step of thermally treating said metal nitride layer comprises the step of rapid thermal annealing at a temperature in the range of 800-950° C. for a duration in the range of 15-120 seconds.
Claim 17
Dependent Claim
44 words
The method of claim 1 , wherein said step of thermally treating said metal nitride layer comprises the step of furnace annealing under an inert ambient at a temperature in the range of 700-950° C. for a duration in the range of 5-30 minutes.
Claim 18
Independent Claim
73 words
A method of fabricating a gate electrode comprising the steps of: forming a gate dielectric over a substrate; forming a polysilicon layer over the gate dielectric; depositing a WNx layer on the polysilicon layer using a chemical-vapor deposition (CVD) process; thermally treating said WNx layer to cause said WNx layer to react with said polysilicon layer to form a thermally stable barrier layer; and then, forming a W layer over said barrier layer.
Claim 19
Independent Claim
73 words
A method of fabricating a gate electrode comprising the steps of: forming a gate dielectric over a substrate; forming a polysilicon layer over the gate dielectric; depositing a WNx layer on the polysilicon layer using a chemical-vapor deposition (CVD) process; thermally treating said WNx layer to cause said WNx layer to react with said polysilicon layer to form a thermally stable barrier layer; and then, forming a W layer over said barrier layer.
Claim 20
Dependent Claim
16 words
The method of claim 17 , wherein said CVD process comprises a plasma enhanced CVD process.
Claim 21
Dependent Claim
15 words
The method of claim 17 , wherein said CVD process comprises a thermal CVD process.
Claim 22
Dependent Claim
14 words
The method of claim 17 , wherein said CVD process comprises a photo-CVD process.
Claim 23
Dependent Claim
25 words
The method of claim 17 , wherein said steps of depositing the WNx layer and depositing the W layer are performed in the same chamber.
Claim 24
Dependent Claim
51 words
The method of claim 17 , further comprising the steps of: patterning and etching said metal, barrier, and silicon layers to form a gate electrode; and selectively oxidizing said gate electrode and substrate to mitigate etch damage and improve gate oxide integrity, wherein said W and barrier layers are not oxidized.
Claim 25
Independent Claim
82 words
A method of fabricating a gate electrode comprising the steps of: forming a gate dielectric over a substrate; forming a polysilicon layer over the gate dielectric; performing a nitridation step; after said nitridation step, depositing a WNx layer over the polysilicon layer using a chemical-vapor deposition (CVD) process; thermally treating said WNx layer to cause said metal nitride layer to react with said polysilicon layer to form a thermally stable barrier layer; and then, forming a W layer over said barrier layer.
Claim 26
Independent Claim
82 words
A method of fabricating a gate electrode comprising the steps of: forming a gate dielectric over a substrate; forming a polysilicon layer over the gate dielectric; performing a nitridation step; after said nitridation step, depositing a WNx layer over the polysilicon layer using a chemical-vapor deposition (CVD) process; thermally treating said WNx layer to cause said metal nitride layer to react with said polysilicon layer to form a thermally stable barrier layer; and then, forming a W layer over said barrier layer.
Claim 27
Independent Claim
86 words
A method of fabricating an integrated circuit comprising the steps of: forming a gate dielectric over a semiconductor body; forming a polysilicon layer over the gate dielectric; depositing a metal-nitride layer on the polysilicon layer using a chemical-vapor-deposition (CVD) process; thermally treating said metal-nitride layer to cause said metal-nitride layer to react with said polysilicon layer to form a thermally stable barrier layer; and then, forming a metal layer over said barrier layer, wherein said metal layer and said metal-nitride layer both comprise the same metal.
Claim 28
Independent Claim
86 words
A method of fabricating an integrated circuit comprising the steps of: forming a gate dielectric over a semiconductor body; forming a polysilicon layer over the gate dielectric; depositing a metal-nitride layer on the polysilicon layer using a chemical-vapor-deposition (CVD) process; thermally treating said metal-nitride layer to cause said metal-nitride layer to react with said polysilicon layer to form a thermally stable barrier layer; and then, forming a metal layer over said barrier layer, wherein said metal layer and said metal-nitride layer both comprise the same metal.
References Cited (Backward Citations)
US4663825A
Cited
US5025295A
Cited
US5049975A
Cited
US5462895A
Cited
US5298443A
Cited
US5545592A
Cited
US5733816A
Cited
US5926730A
Cited
US5874353A
Cited
US5913145A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-02-13 | 2004-08-14 | 2005-02-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-02-13 | 2008-08-14 | 2009-02-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-02-13 | 2012-08-14 | 2013-02-13 | $7700.00 | Window Closed / Lapsed |