Patent US6181352B1 successfully refreshed from Google Patents.
US6181352B1
Expired / Lapsed
US
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Graphics pipeline selectively providing multiple pixels or multiple textures
Assignee: Nvidia Corp
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Filing: 1999-03-22
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Granted: 2001-01-30
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Expires: 2019-03-22
Abstract
Abstract A graphics accelerator pipeline including a combiner stage capable of producing output values during each clock interval of the pipeline which map a plurality of textures to a single pixel or an individual texture to two pixels.
Inventors
- 👤 David B. Kirk
- 👤 Gopal Solanki
- 👤 Curtis Priem
- 👤 Walter Donovan
- 👤 Joe L. Yeun
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 15:35
CPC Classifications
G; G06; G06T; G06T15/00; G06T15/005
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
112 words
A graphics accelerator pipeline, comprising: a rasterizer stage configured to generate pixel coordinates and color values for at least two pixels during each clock interval of the pipeline in response to data indicative of a single polygonal primitive; a texture stage configured to generate at least two texture values, each for a different pixel, during each clock interval of the pipeline; and a combiner stage coupled to receive the pixel coordinates, the color values, and the texture values for each pixel of a set of at least two pixels, and configured to generate, in response thereto, output values for said each pixel of said set during each clock interval of the pipeline.
Claim 2
Dependent Claim
112 words
A graphics accelerator pipeline, comprising: a rasterizer stage configured to generate pixel coordinates and color values for at least two pixels during each clock interval of the pipeline in response to data indicative of a single polygonal primitive; a texture stage configured to generate at least two texture values, each for a different pixel, during each clock interval of the pipeline; and a combiner stage coupled to receive the pixel coordinates, the color values, and the texture values for each pixel of a set of at least two pixels, and configured to generate, in response thereto, output values for said each pixel of said set during each clock interval of the pipeline.
Claim 3
Dependent Claim
73 words
The graphics accelerator pipeline of claim 1 , also comprising: a frame buffer blend stage coupled to receive the output values for each pixel of a set of at least two pixels and configured to generate blended color values for said each pixel of the set, during each clock interval of the pipeline, by blending said output values with color values having pixel coordinates matching those of said each pixel of the set.
Claim 4
Independent Claim
172 words
A method for operating a single graphics accelerator pipeline in response to a clock signal, to accomplish pipelined generation of output values for a sequence of pixels, said method comprising the steps of: (a) generating pixel coordinates and color values, for each pixel of a set of at least two pixels, during a first clock interval of the clock signal, in response to data indicative of a single polygonal primitive; (b) generating texture values for said each pixel of the set during a second clock interval of the clock signal, wherein the second clock interval is a single clock interval of the clock signal subsequent to the first clock interval; and (c) in response to the pixel coordinates, the color values, and the texture values for said each pixel of the set, generating the output values for said each pixel of said set during a third clock interval of the clock signal, wherein the third clock interval is a single clock interval of the clock signal subsequent to the second clock interval.
Claim 5
Independent Claim
172 words
A method for operating a single graphics accelerator pipeline in response to a clock signal, to accomplish pipelined generation of output values for a sequence of pixels, said method comprising the steps of: (a) generating pixel coordinates and color values, for each pixel of a set of at least two pixels, during a first clock interval of the clock signal, in response to data indicative of a single polygonal primitive; (b) generating texture values for said each pixel of the set during a second clock interval of the clock signal, wherein the second clock interval is a single clock interval of the clock signal subsequent to the first clock interval; and (c) in response to the pixel coordinates, the color values, and the texture values for said each pixel of the set, generating the output values for said each pixel of said set during a third clock interval of the clock signal, wherein the third clock interval is a single clock interval of the clock signal subsequent to the second clock interval.
Claim 6
Dependent Claim
36 words
The method of claim 3 , wherein the texture values generated in step (b) include a first texture value determined by a first texture map, and a second texture value determined by the first texture map.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-01-30 | 2004-07-31 | 2005-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-01-30 | 2008-07-31 | 2009-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-01-30 | 2012-07-31 | 2013-01-30 | $7700.00 | Window Closed / Lapsed |