US5720019A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Computer graphics system having high performance primitive clipping preprocessing
Assignee: Hewlett Packard Development Co LP
•
Filing: 1995-06-08
•
Granted: 1998-02-17
•
Expires: 2015-06-08
Abstract
Abstract A graphics processing circuit for use in a graphics accelerator that includes a clipping processor, with a vertex input data path operatively connected to a vertex data input of the clipping processor. A clipping preprocessor has a vertex data input operatively connected to the vertex input data path and a control output operatively connected to a control input of the clipping processor. The clipping preprocessor is constructed and arranged to perform an evaluation of a relationship between primitive vertex data from the vertex input data path and a clip region and to provide a signal on the control output based on this evaluation.
Inventors
- 👤 Louise A. Koss
- 👤 Mary Louise Nash
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 18:05
CPC Classifications
G; G06; G06T; G06T15/00; G06T15/10; G06T15/30; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30007; G06F9/30021
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
187 words
A graphics processing circuit for use in a graphics accelerator that includes a clipping processor having a vertex data input and a control input and being constructed and arranged to clip a primitive relative to a clip region based on primitive vertex data from its vertex data input and under control of its control input, comprising: a vertex input data path operatively connected to the vertex data input of the clipping processor, a clipping preprocessor circuit having a vertex data input operatively connected to the vertex input data path and a control output operatively connected to the control input of the clipping processor, the clipping preprocessor being constructed and arranged to perform an evaluation of a relationship between the primitive vertex data from the vertex input data path and the clip region and to provide a signal on the control output based on this evaluation, and wherein the clipping preprocessor includes at least three vertex processing circuits each including clip code circuitry and wherein the clipping preprocessor includes trivial accept/reject circuitry having an input responsive to the clip code circuitry for each of the vertex processing circuits.
Claim 2
Dependent Claim
187 words
A graphics processing circuit for use in a graphics accelerator that includes a clipping processor having a vertex data input and a control input and being constructed and arranged to clip a primitive relative to a clip region based on primitive vertex data from its vertex data input and under control of its control input, comprising: a vertex input data path operatively connected to the vertex data input of the clipping processor, a clipping preprocessor circuit having a vertex data input operatively connected to the vertex input data path and a control output operatively connected to the control input of the clipping processor, the clipping preprocessor being constructed and arranged to perform an evaluation of a relationship between the primitive vertex data from the vertex input data path and the clip region and to provide a signal on the control output based on this evaluation, and wherein the clipping preprocessor includes at least three vertex processing circuits each including clip code circuitry and wherein the clipping preprocessor includes trivial accept/reject circuitry having an input responsive to the clip code circuitry for each of the vertex processing circuits.
Claim 3
Dependent Claim
61 words
The apparatus of claim 1 wherein each vertex processing circuit has an enable input and is constructed and arranged to generate clip codes for the primitive based on the primitive vertex data from its vertex data input, the graphics processing circuit further comprising: a comparator between the vertex input data path and the vertex data input of the vertex processing circuitry.
Claim 4
Dependent Claim
30 words
The apparatus of claim 1 wherein each of the vertex processing circuits in the clipping preprocessor includes x coordinate preprocessing circuitry, y coordinate preprocessing circuitry, and z coordinate preprocessing circuitry.
Claim 5
Dependent Claim
48 words
The apparatus of claim 3 wherein the x coordinate preprocessing circuitry, the y coordinate preprocessing circuitry, and the z coordinate preprocessing circuitry each include memory cells in a shift register and wherein the trivial accept/reject circuitry has combinatorial logic circuitry operatively connected to outputs of the memory cells.
Claim 6
Dependent Claim
88 words
The apparatus of claim 1 wherein the clipping preprocessor circuit includes: a vertex coordinate register operatively connected to the vertex input data path, a window edge coordinate register operatively connected to the vertex input data path, a comparator having a first input operatively connected to an output of the vertex coordinate register, a second input operatively connected to an output of the window edge coordinate register, and having a comparison output, and wherein the vertex processing circuits include a plurality of inputs operatively connected to the comparison output.
Claim 7
Dependent Claim
13 words
The apparatus of claim 5 wherein the comparator is a floating point comparator.
Claim 8
Dependent Claim
25 words
The apparatus of claim 5 wherein the vertex processing circuits each include a shift register having a parallel input operatively connected to the comparison output.
Claim 9
Dependent Claim
21 words
The apparatus of claim 1 further including a clip code bus operatively connected between the clipping preprocessor and the clipping processor.
Claim 10
Dependent Claim
15 words
The apparatus of claim 1 wherein the vertex processing circuits each have an enable line.
Claim 11
Dependent Claim
143 words
A graphics processing method, comprising: generating clip codes from a definition of a first primitive having at least three vertices, the clip codes including subcodes for each coordinate of each of the vertices, after the step of generating, determining whether the coordinates of the primitive are all outside the boundary of the clip region based on the clip codes, allowing a clipping processor to clip the primitive in response to a result of the step of determining if the step of determining determines that some but not all of the coordinates of the primitive are outside of the boundary of the clip region, and inhibiting the clipping processor from clipping the primitive in response to a result of the step of determining if the step of determining determines that the coordinates of the primitive are all outside the boundary of the clip region.
Claim 12
Dependent Claim
143 words
A graphics processing method, comprising: generating clip codes from a definition of a first primitive having at least three vertices, the clip codes including subcodes for each coordinate of each of the vertices, after the step of generating, determining whether the coordinates of the primitive are all outside the boundary of the clip region based on the clip codes, allowing a clipping processor to clip the primitive in response to a result of the step of determining if the step of determining determines that some but not all of the coordinates of the primitive are outside of the boundary of the clip region, and inhibiting the clipping processor from clipping the primitive in response to a result of the step of determining if the step of determining determines that the coordinates of the primitive are all outside the boundary of the clip region.
Claim 13
Dependent Claim
70 words
The method of claim 10 wherein the step of generating is performed by a first graphics processor portion and further including the step of inhibiting the transfer of display parameters of the primitive to a second graphics processor portion in response to the result of the step of determining if the step of determining determines that the coordinates of the primitive are all outside the boundary of the clip region.
Claim 14
Dependent Claim
67 words
The method of claim 10 further including the steps of generating further clip codes from a definition of a second primitive that is different from the first primitive and that has only coordinates outside of the boundary of the clip region, and based on the further clip codes failing to determine that the coordinates of the second primitive are all outside the boundary of the clip region.
Claim 15
Dependent Claim
64 words
The method of claim 10 further including the steps of generating further clip codes from a definition of a second primitive that is different from the first primitive and that has only coordinates inside the boundary of the clip region, and determining based on the further clip codes that the coordinates of the second primitive are all inside the boundary of the clip region.
Claim 16
Dependent Claim
37 words
The method of claim 10 wherein the step of generating is performed by a first graphics processor portion and further including the step of transferring the clip codes for the primitive to a second graphics processor portion.
Claim 17
Dependent Claim
31 words
The method of claim 10 further including the step of generating clip codes from a definition of a second primitive that has a different number of vertices than the first primitive.
Claim 18
Dependent Claim
13 words
The apparatus of claim 1 wherein the trivial accept/reject logic is purely combinatorial.
Claim 19
Dependent Claim
17 words
The method of claim 10 wherein the step of determining is performed entirely by combinatorial logic circuitry.
Claim 20
Dependent Claim
31 words
The method of claim 15 wherein the step of generating a clip code from a definition of a second primitive generates a clip code for a primitive that has four vertices.
References Cited (Backward Citations)
US4888712A
Cited
US4945500A
Cited
GB2226219A
Cited
US5003497A
Cited
US5051737A
Cited
US5079719A
Cited
US5208909A
Cited
FR2693012A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-02-16 | 2001-08-18 | 2002-02-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-02-16 | 2005-08-18 | 2006-02-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-02-16 | 2009-08-18 | 2010-02-17 | $7700.00 | Window Closed / Lapsed |