US6177946B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for processing video data and graphics data by a graphic controller
Assignee: ATI Technologies ULC
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Filing: 1997-11-14
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Granted: 2001-01-23
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Expires: 2017-11-14
Abstract
Abstract A method and apparatus for processing video and graphics data is accomplished by receiving display data that includes at least one of video data and graphics data. If the display data includes video data, the video data is converted into graphics formatted video data when a first control signal is in a first state. The graphics formatted video data, which is now in a format consistent with the computer monitor (e.g., an RGB video format), is then provided to the computer monitor based on the enablement of the first control signal. Alternately, or in addition to, the graphics data may be provided to the computer monitor. If the display data includes graphics data, i.e., computer generated data for display on a computer monitor, the graphics data is converted into video formatted graphics data when a second control signal is in a second state. In this conversion, the graphics data, which is in a RGB format, is converted into a video format, e.g., a YUV data format. Having made the conversion, the video data and/or the video format graphics data is provided to a television based on the second control signal.
Inventors
- 👤 David Edward Sinclair
- 👤 Oswin Hall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:18
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/64; H04N9/641; G; G09; G09G; G09G5/00; G09G5/36; G09G5/363; G09G2340/00; G09G2340/04; G09G2340/0407; G09G2360/00; G09G2360/02
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
181 words
A video graphics circuit comprises: memory for storing display data, wherein the display data includes at least one of video data and graphics data; first circuit operably coupled to provide at least a portion of the display data to a monitor based on a first control signal, wherein, when the first control signal is in a first state, the first circuit converts the video data into graphics formatted video data and provides the graphics formatted video data to the monitor, and wherein, when the first control signal is in a second state, the first circuit passes the graphics data to the monitor; and second circuit operably coupled to provide at least a portion of the display data to a television based on a second control signal, wherein, when the second control signal is in a first state, the second circuit converts the graphics data into video formatted graphics data and provides the video formatted graphics data to the television, and wherein, when the second control signal is in a second state, the second circuit passes the video data to the television.
Claim 2
Dependent Claim
181 words
A video graphics circuit comprises: memory for storing display data, wherein the display data includes at least one of video data and graphics data; first circuit operably coupled to provide at least a portion of the display data to a monitor based on a first control signal, wherein, when the first control signal is in a first state, the first circuit converts the video data into graphics formatted video data and provides the graphics formatted video data to the monitor, and wherein, when the first control signal is in a second state, the first circuit passes the graphics data to the monitor; and second circuit operably coupled to provide at least a portion of the display data to a television based on a second control signal, wherein, when the second control signal is in a first state, the second circuit converts the graphics data into video formatted graphics data and provides the video formatted graphics data to the television, and wherein, when the second control signal is in a second state, the second circuit passes the video data to the television.
Claim 3
Dependent Claim
29 words
The video graphics circuit of claim 1 further comprises the video data being at least one of YUV data and YCbCr data and the graphics data being RGB data.
Claim 4
Dependent Claim
90 words
The video graphics circuit of claim 1 further comprises, within the first circuit, a first format converter operably coupled to receive the video data and to convert the video data into the graphics formatted video data; and a multiplexor operably coupled to receive the graphics formatted video data, the graphics data, and the first control signal, wherein the multiplexor outputs the graphics formatted video data when the first control signal is in the first state and outputs the graphics data when the first control signal is in the second state.
Claim 5
Dependent Claim
38 words
The video graphics circuit of claim 3 further comprises a scaler operably coupled to the memory and the first format converter, wherein the scaler scales the video data prior to being converted into the graphics formatted video data.
Claim 6
Dependent Claim
34 words
The video graphics circuit of claim 3 further comprises a digital to analog converter such that the monitor is provided with an analog representation of the graphics data and the graphics formatted video data.
Claim 7
Dependent Claim
144 words
The video graphics circuit of claim 1 further comprises, within the second circuit, a synchronization circuit operably coupled to receive the graphics data and to produce synchronized graphics data therefrom; a multiplexor operably coupled to receive the synchronized graphics data, the video data, and the second control signal, wherein the multiplexor outputs the synchronized graphics data when the second control signal is in the first state and outputs the video data when the second control signal is in the second state; and a video data converter operably coupled to receive the output from the multiplexor and the second control signal, wherein the video data converter converts the synchronized graphics data into the video formatted graphics data when the control signal is in the first state, and wherein the video data converter passes the video data when the control signal is in the second state.
Claim 8
Dependent Claim
28 words
The video graphics circuit of claim 6 further comprises, within the video data converter, a level converter that converts the video data from YCbCr data to YUV data.
Claim 9
Dependent Claim
34 words
The video graphics circuit of claim 6 further comprises a digital to analog converter such that the television is provided with an analog representation of the video data and the video formatted graphics data.
Claim 10
Dependent Claim
42 words
The video graphics circuit of claim 1 further comprises the first circuit processing a first portion of the video data for display on the monitor and the second circuit processing a second portion of the video data for display on the television.
Claim 11
Dependent Claim
189 words
A video graphics circuit comprises: a scaling circuit operably coupled to receive video data and scale the video data, wherein the video data is scaled from full display video data to non-full display video data, from the non-full display video data to the full display video data, or from the non-full display video data to the non-full display video data; graphics format converter operably coupled to receive the video data and to produce therefrom graphics formatted video data; video format converter operably coupled to receive graphics data and to produce therefrom video formatted graphics data; monitor output circuit operably coupled to provide the graphics formatted video data to a monitor when a first control signal is in a first state and to provide the graphics data to the monitor when the first control signal is in a second state; and television output circuit operably coupled to provide the video formatted graphics data to a television when a second control signal is in a first state and to provide at least a portion of the video data to the television when the second control signal is in a second state.
Claim 12
Dependent Claim
189 words
A video graphics circuit comprises: a scaling circuit operably coupled to receive video data and scale the video data, wherein the video data is scaled from full display video data to non-full display video data, from the non-full display video data to the full display video data, or from the non-full display video data to the non-full display video data; graphics format converter operably coupled to receive the video data and to produce therefrom graphics formatted video data; video format converter operably coupled to receive graphics data and to produce therefrom video formatted graphics data; monitor output circuit operably coupled to provide the graphics formatted video data to a monitor when a first control signal is in a first state and to provide the graphics data to the monitor when the first control signal is in a second state; and television output circuit operably coupled to provide the video formatted graphics data to a television when a second control signal is in a first state and to provide at least a portion of the video data to the television when the second control signal is in a second state.
Claim 13
Dependent Claim
21 words
The video graphics circuit of claim 10 further comprises, within the scaling circuit, a de-interlacing circuit that de-interlaces the video data.
Claim 14
Dependent Claim
31 words
The video graphics circuit of claim 10 further comprises, within the video format converter, a level converter that converts a level of the video data to produced level adjusted video data.
Claim 15
Dependent Claim
24 words
The video graphics circuit of claim 12 further comprises the video data being YCbCr data and the level adjusted video data being YUV data.
Claim 16
Independent Claim
119 words
A method for processing video data, the method comprises the steps of: a) receiving display data, wherein the display data includes at least one of video data and graphics data; b) converting the video data into graphics formatted video data when a first control signal is in a first state; c) providing at least one of the graphics formatted video data and the graphics data to a monitor based on the first control signal; d) converting the graphics data into video formatted graphics data when a second control signal is in a second state; and e) providing at least one of the video data and the video formatted graphics data to a television based on the second control signal.
Claim 17
Independent Claim
119 words
A method for processing video data, the method comprises the steps of: a) receiving display data, wherein the display data includes at least one of video data and graphics data; b) converting the video data into graphics formatted video data when a first control signal is in a first state; c) providing at least one of the graphics formatted video data and the graphics data to a monitor based on the first control signal; d) converting the graphics data into video formatted graphics data when a second control signal is in a second state; and e) providing at least one of the video data and the video formatted graphics data to a television based on the second control signal.
Claim 18
Dependent Claim
34 words
The method of claim 14 further comprises, within step (b), converting the video graphics data, which is in an YCbCr data format, into the graphics formatted video data, which is an RGB data format.
Claim 19
Dependent Claim
58 words
The method of claim 14 further comprises, prior to the converting the video data into the graphics formatted video data, scaling the video data to produced scaled video data, wherein the video data is scaled from full display video data to non-full display video data or from the non-full display video data to the full display video data.
Claim 20
Dependent Claim
134 words
A video graphics processing circuit comprises: a processing unit; and memory that stores programming instructions that, when read by the processing unit, causes the processing unit to (a) receive display data, wherein the display data includes at least one of video data and graphics data; (b) convert the video data into graphics formatted video data when a first control signal is in a first state; (c) provide at least one of the graphics formatted video data and the graphics data to a monitor based on the first control signal; (d) convert the graphics data into video formatted graphics data when a second control signal is in a second state; and (e) provide at least one of the video data and the video formatted graphics data to a television based on the second control signal.
Claim 21
Dependent Claim
134 words
A video graphics processing circuit comprises: a processing unit; and memory that stores programming instructions that, when read by the processing unit, causes the processing unit to (a) receive display data, wherein the display data includes at least one of video data and graphics data; (b) convert the video data into graphics formatted video data when a first control signal is in a first state; (c) provide at least one of the graphics formatted video data and the graphics data to a monitor based on the first control signal; (d) convert the graphics data into video formatted graphics data when a second control signal is in a second state; and (e) provide at least one of the video data and the video formatted graphics data to a television based on the second control signal.
Claim 22
Dependent Claim
51 words
The video graphics processing circuit of claim 17 further comprises, within the memory, programming instructions that, when read by the processing unit, causes the processing unit to convert the video graphics data, which is in an YCbCr data format, into the graphics formatted video data, which is an RGB data format.
Claim 23
Dependent Claim
78 words
The video graphics processing circuit of claim 17 further comprises, within the memory, programming instructions that, when read by the processing unit, causes the processing unit to, prior to the converting the video data into the graphics formatted video data, scale the video data to produced scaled video data, wherein the video data is scaled from full display video data to non-full display video data or from the non-full display video data to the full display video data.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-01-23 | 2004-07-24 | 2005-01-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-01-23 | 2008-07-24 | 2009-01-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-01-23 | 2012-07-24 | 2013-01-23 | $7700.00 | Window Closed / Lapsed |