US6173435B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Internal clock handling in synthesis script
Assignee: Bell Semiconductor LLC
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Filing: 1998-02-20
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Granted: 2001-01-09
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Expires: 2018-02-20
Abstract
Abstract A method of synthesizing integrated circuit chip (IC) designs having clock signals defined internal to a module comprising the steps of mapping the IC design to a target technology with the internal clock defined, removing definitions of the internal clock, re-synthesizing the IC design, and re-defining the internal clock using new names of clock sources.
Inventors
- 👤 Guy Dupenloup
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 23:17
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
68 words
A method of synthesizing an integrated circuit (IC) design having an internal clock that is generated internally by the IC, said method comprising the steps: mapping the IC design to a target technology with the internal clock defined; removing a definition of the internal clock; re-synthesizing the IC design with the definition of the internal clock removed; and re-defining the internal clock upon completion of said re-synthesizing step.
Claim 2
Independent Claim
68 words
A method of synthesizing an integrated circuit (IC) design having an internal clock that is generated internally by the IC, said method comprising the steps: mapping the IC design to a target technology with the internal clock defined; removing a definition of the internal clock; re-synthesizing the IC design with the definition of the internal clock removed; and re-defining the internal clock upon completion of said re-synthesizing step.
Claim 3
Dependent Claim
35 words
A method according to claim 1 wherein a new name for a source pin of the internal clock is retrieved, if said source pin is connected to an output port, by locating said output port.
Claim 4
Dependent Claim
35 words
A method according to claim 1 wherein a new name for a source pin of the internal clock is retrieved, if said source pin is connected to a synchronous RAM. by locating said synchronous RAM.
Claim 5
Dependent Claim
51 words
A method according to claim 1 wherein a new name for a source pin of the internal clock is retrieved by: setting a “dont_touch” attribute on a net connected to a source pin of the internal clock; saving a name for said net; and locating a pin that drives said net.
Claim 6
Dependent Claim
18 words
A method according to claim 4 wherein the name for said net is saved in a dc_shell variable.
Claim 7
Independent Claim
81 words
An apparatus for synthesizing an integrated circuit (IC) design having an internal clock that is generated internally by the IC, said apparatus comprising: a processor; memory connected to said processor; said memory having instructions for said processor to map the IC design to a target technology with the internal clock defined; remove a definition of the internal clock; re-synthesize the IC design with the definition of the internal clock removed; and re-define the internal clock upon completion of said re-synthesizing step.
Claim 8
Independent Claim
81 words
An apparatus for synthesizing an integrated circuit (IC) design having an internal clock that is generated internally by the IC, said apparatus comprising: a processor; memory connected to said processor; said memory having instructions for said processor to map the IC design to a target technology with the internal clock defined; remove a definition of the internal clock; re-synthesize the IC design with the definition of the internal clock removed; and re-define the internal clock upon completion of said re-synthesizing step.
Claim 9
Independent Claim
74 words
An apparatus for synthesizing an integrated circuit (IC) design having an internal clock that is generated internally by the IC, said apparatus comprising: means for mapping the IC design to a target technology with the internal clock defined; means for removing a definition of the internal clock; means for re-synthesizing the IC design with the definition of the internal clock removed; and means for re-defining the internal clock upon completion of said re-synthesizing step.
Claim 10
Independent Claim
74 words
An apparatus for synthesizing an integrated circuit (IC) design having an internal clock that is generated internally by the IC, said apparatus comprising: means for mapping the IC design to a target technology with the internal clock defined; means for removing a definition of the internal clock; means for re-synthesizing the IC design with the definition of the internal clock removed; and means for re-defining the internal clock upon completion of said re-synthesizing step.
Claim 11
Dependent Claim
73 words
A computer storage medium containing instructions for synthesizing an integrated circuit (IC) design having an internal clock that is generated internally by the IC, said instructions comprising the steps of: mapping the IC design to a target technology with the internal clock defined; removing a definition of the internal clock; re-synthesizing the IC design with the definition of the internal clock removed; and re-defining the internal clock upon completion of said re-synthesizing step.
Claim 12
Dependent Claim
73 words
A computer storage medium containing instructions for synthesizing an integrated circuit (IC) design having an internal clock that is generated internally by the IC, said instructions comprising the steps of: mapping the IC design to a target technology with the internal clock defined; removing a definition of the internal clock; re-synthesizing the IC design with the definition of the internal clock removed; and re-defining the internal clock upon completion of said re-synthesizing step.
Claim 13
Dependent Claim
36 words
A computer storage medium of claim 8 wherein said computer storage medium is selected from a group consisting of magnetic device, optical device, magneto-optical device, floppy diskette, CD-ROM, magnetic tape, computer hard drive, and memory card.
Claim 14
Independent Claim
92 words
A method of generating scripts for logic synthesis tools to correctly handle an internal clock of an integrated circuit (IC) design, the internal clock being generated internally by the IC, said method comprising: generating script commands to map the IC design to a target technology with the internal clock defined; generating script commands to remove a definition of the internal clock; generating script commands to re-synthesize the IC design with the definition of the internal clock removed; and generating script commands to re-define the internal clock upon completion of said re-synthesizing step.
Claim 15
Independent Claim
92 words
A method of generating scripts for logic synthesis tools to correctly handle an internal clock of an integrated circuit (IC) design, the internal clock being generated internally by the IC, said method comprising: generating script commands to map the IC design to a target technology with the internal clock defined; generating script commands to remove a definition of the internal clock; generating script commands to re-synthesize the IC design with the definition of the internal clock removed; and generating script commands to re-define the internal clock upon completion of said re-synthesizing step.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-01-09 | 2004-07-10 | 2005-01-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-01-09 | 2008-07-10 | 2009-01-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-01-09 | 2012-07-10 | 2013-01-09 | $7700.00 | Window Closed / Lapsed |