Liquid crystal display

Claim 2

A liquid crystal display comprising: a first substrate; a plurality of gate lines and a plurality of drain lines formed on the first substrate and defining a plurality of pixels; a thin film transistor for each pixel formed on the first substrate, the thin film transistor having a gate electrode connected to a gate line, a drain electrode connected to a drain line, and source electrode; an inter-layer insulation film having a thickness of at least 3 μm and formed over the thin film transistors, the gate lines and the drain lines; a pixel electrode for each pixel, the pixel electrode being connected to the source electrode of the thin film transistor and at least partially formed on the inter-layer insulation film; a second substrate disposed opposite the first substrate; a liquid crystal layer filled between the first and second substrates; and a common electrode formed on the second substrate, wherein the common electrode defines an orientation control window disposed across the liquid crystal layer from each pixel, the orientation control window being a region on the second substrate free of the common electrode, wherein when a voltage is applied between the common electrode and the pixel electrode, weak electric fields are generated in the vicinity of the orientation control window, and electric fields in a sloped direction are generated around edges of the pixel electrode, so that the horizontal orientation of the liquid crystal molecules in a pixel electrode region is controlled through the weak electric fields and the electric fields in a sloped direction.

Claim 3

A liquid crystal display as defined in claim 1, wherein the inter-layer insulation film has a thickness α of at least 0.5 μm or over.

Claim 4

A liquid crystal display as defined in claim 1, wherein the inter-layer insulation film has a thickness α of at least 1 μm.

Claim 5

A liquid crystal display as defined in claim 1, wherein the inter-layer insulation film has a thickness α which is equal to or greater than a half of the interval χ between two adjacent pixel electrodes among the plurality of pixel electrodes.

Claim 6

A liquid crystal display as defined in claim 1, wherein each of the plurality of pixel electrodes is formed in a region defined by the gate line and the drain line and overlaps at least a part of the gate line and/or the drain line with the inter-layer insulation film interposed therebetween.

Claim 7

A liquid crystal display as defined in claim 5, wherein the inter-layer insulation film has a thickness α which is equal to or greater than a half of an interval χ between two adjacent pixel electrodes among the plurality of pixel electrodes.

Claim 8

A liquid crystal display as defined in claim 1, wherein the orientation control window is formed on a region opposing the pixel electrode along a diagonal direction thereof.

Claim 9

A liquid crystal display as defined in claim 1, wherein the orientation control window is formed having a substantial letter X shape whose crossing point falls on a region opposing to around a center of that pixel electrode.

Claim 10

A liquid crystal display as define in claim 1, wherein each orientation control window includes a linear part extending substantially in parallel to an edge of the corresponding pixel electrode, and a branch part extending continuously from each end of the linear part toward respective comers of the pixel electrode, the linear part being formed on a region closely opposing the center of the pixel electrode.

Claim 11

The liquid crystal display of claim 1, wherein at least parts of the thin film transistor, and/or the gate line, and/or the drain line are disposed below the corresponding pixel electrode with the inter-layer insulation film interposed therebetween.

Claim 12

A liquid crystal display device as defined in claim 10, wherein the thin film transistor, and/or the gate line, and/or the drain line are situated while being projected from a region where corresponding one of the plurality of pixel electrodes is formed by an extent y, a half value y/2 of the extent y being equal to or less than a thickness α of the inter-layer insulating film.

Claim 13

A liquid crystal display device as defined in claim 10, wherein the thin film transistor, and/or the gate line, and/or the drain line are situated while being projected from a region where corresponding one of the plurality of pixel electrodes is formed by an extent y, a half value y/2 of the extent y being equal to or less than a half of an interval χ between two adjacent pixel electrodes among the plurality of pixel electrodes.

Claim 14

A liquid crystal display as defined in claim 10, wherein the plurality of pixel electrodes are reflector electrodes made of conductive reflective material.

Claim 15

The liquid crystal display of claim 10, wherein the thin film transistors are separated from the liquid crystal by the inter-layer insulation layer and the pixel electrode.

Claim 16

The liquid crystal display of claim 10, wherein the gate lines and/or the drain lines are separated from the liquid crystal by the inter-layer insulation layer and the pixel electrode.

Claim 17

The liquid crystal display of claim 1, wherein the liquid crystal has a horizontal orientation controlled by an electric field formed by the pixel electrodes and the common electrode.

Claim 20

The method of claim 17, wherein the inter-layer insulation film is at least about 0.5 μm thick.

Claim 21

The method of claim 17, wherein the inter-layer insulation film is at least about 1 μm thick.

Claim 22

The method of claim 17, wherein the inter-layer insulation film has a thickness equal to or greater than about a half of an interval between two adjacent pixel electrodes.

Claim 23

The method of claim 17, wherein each of the plurality of pixel electrodes is formed in a region defined by the gate line and the drain line and overlaps at least a part of the gate line and/or the drain line with the inter-layer insulation film interposed therebetween.

Claim 24

A liquid crystal display comprising: a first substrate; a plurality of gate lines and a plurality of drain lines formed on the first substrate and defining a plurality of pixels; a thin film transistor for each pixel formed on the first substrate, the thin film transistor having a gate electrode connected to a gate line, a drain electrode connected to a drain line, and a source electrode; an inter-layer insulation film formed over the thin film transistors, the gate lines and the drain lines; a pixel electrode for each pixel, the pixel electrode being connected to the source electrode of the thin film transistor and at least partially formed on the inter-layer insulation film; a second substrate disposed opposite the first substrate; a liquid crystal layer filled between the first and second substrates; and a common electrode formed on the second substrate, wherein the common electrode defines an orientation control window disposed across the liquid crystal layer from each pixel, the orientation control window being a region on the second substrate free of the common electrode, wherein when a voltage is applied between the common electrode and the pixel electrode, weak electric fields are generated in the vicinity of the orientation control window, and electric fields in a sloped direction are generated around edges of the pixel electrode, so that the horizontal orientation of the liquid crystal molecules in a pixel electrode region is controlled through the weak electric fields and the electric fields in a sloped direction, and wherein the thickness of the insulation film is equal to or greater than a half of the interval between two adjacent pixel electrodes.

Claim 25

A liquid crystal display comprising: a first substrate; a plurality of gate lines and a plurality of drain lines formed on the first substrate and defining a plurality of pixels; a thin film transistor for each pixel formed on the first substrate, the thin film transistor having a gate electrode connected to a gate line, a drain electrode connected to a drain line, and a source electrode; an inter-layer insulation film formed over the thin film transistors, the gate lines and the drain lines; a pixel electrode for each pixel, the pixel electrode being connected to the source electrode of the thin film transistor and at least partially formed on the inter-layer insulation film; a second substrate disposed opposite the first substrate; a liquid crystal layer filled between the first and second substrates; and a common electrode formed on the second substrate, wherein the common electrode defines an orientation control window disposed across the liquid crystal layer from each pixel, the orientation control window being a region on the second substrate free of the common electrode, wherein when a voltage is applied between the common electrode and the pixel electrode, weak electric fields are generated in the vicinity of the orientation control window, and electric fields in a sloped direction are generated around edges of the pixel electrode, so that the horizontal orientation of the liquid crystal molecules in a pixel electrode region is controlled through the weak electric fields and the electric fields in a sloped direction, and wherein the thickness of the insulation film is equal to or greater than a half of the interval between two adjacent pixel electrodes.