Patent US6156600A successfully refreshed from Google Patents.
US6156600A
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Method for fabricating capacitor in integrated circuit
Assignee: United Microelectronics Corp
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Filing: 1998-11-17
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Granted: 2000-12-05
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Expires: 2018-11-17
Abstract
Abstract A method for fabricating a capacitor in an integrated circuit, using tantalum oxide as the dielectric layer to obtain a higher capacitance. A barrier layer is formed between the polysilicon layer and the tantalum oxide layer to prevent the formation of a silicon oxide layer. Thus, that capacitance of the capacitor is not reduced by the additional thickness of the silicon oxide layer.
Inventors
- 👤 Fang-Ching Chao
- 👤 Wen-Yi Hsieh
- 👤 Kuo-Tai Huang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 03:31
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10D1/684; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/65; H10P14/6516; H10P14/6518; H10P14/6524; H10P14/6526; H10P14/6529; H10P14/66; H10P14/662; H10P14/668; H10P14/69; H10P14/692; H10P14/6938; H10P14/6939; H10P14/69393
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
72 words
A method for fabricating a capacitor in an integrated circuit, comprising: forming a bottom electrode on a substrate; forming a first tantalum oxide layer on the bottom electrode; forming a first tantalum oxide nitride layer on the first tantalum oxide layer; forming a second tantalum oxide layer on the first tantalum oxide nitride layer; forming a second tantalum oxide nitride layer on the second tantalum oxide layer; and forming a top electrode.
Claim 2
Independent Claim
72 words
A method for fabricating a capacitor in an integrated circuit, comprising: forming a bottom electrode on a substrate; forming a first tantalum oxide layer on the bottom electrode; forming a first tantalum oxide nitride layer on the first tantalum oxide layer; forming a second tantalum oxide layer on the first tantalum oxide nitride layer; forming a second tantalum oxide nitride layer on the second tantalum oxide layer; and forming a top electrode.
Claim 3
Dependent Claim
14 words
The method according to claim 1, wherein the bottom electrode is a polysilicon layer.
Claim 4
Dependent Claim
36 words
The method according to claim 1, wherein the first tantalum oxide layer is formed by low pressure chemical vapor deposition and using tetra-acetyl-ethyl-tantalum-oxide as precursor at a deposition temperature between about 300° C. to 550° C.
Claim 5
Dependent Claim
14 words
The method according to claim 3, wherein the deposition temperature is about 400° C.
Claim 6
Dependent Claim
32 words
The method according to claim 1, wherein the first tantalum oxide layer is formed by low pressure chemical vapor deposition and using tetra-acetylethyl-tantalum-oxide as precursor at a deposition temperature about 400° C.
Claim 7
Dependent Claim
22 words
The method according to claim 1, wherein the first tantalum oxide layer has a thickness of about 1 nm to 2 nm.
Claim 8
Dependent Claim
61 words
The method according to claim 1, wherein after the first tantalum oxide layer is formed, a first rapid thermal anneal is performed to form the first tantalum oxide nitride layer, wherein, the first rapid thermal anneal is performed under: an environment of ammonia; an annealing temperature at about 800° C.; and an annealing interval of about 40 sec to 2 min.
Claim 9
Dependent Claim
25 words
The method according to claim 7, wherein the first tantalum oxide nitride layer is formed by reacting the first tantalum oxide layer with the ammonia.
Claim 10
Dependent Claim
36 words
The method according to claim 1, wherein the second tantalum oxide layer is formed by low pressure chemical vapor deposition and using tetra-acetyl-ethyl-tantalum-oxide as precursor at a deposition temperature between about 300° C. to 550° C.
Claim 11
Dependent Claim
14 words
The method according to claim 9, wherein the deposition temperature is about 400° C.
Claim 12
Dependent Claim
32 words
The method according to claim 1, wherein the second tantalum oxide layer is formed by low pressure chemical vapor deposition and using tetra-acetyl-ethyl-tantalum-oxide as precursor at a deposition temperature about 400° C.
Claim 13
Dependent Claim
22 words
The method according to claim 1, wherein the second tantalum oxide layer has a thickness of about 70 Å to 150 Å.
Claim 14
Dependent Claim
46 words
The method according to claim 1, wherein after the second tantalum oxide layer is formed, a second rapid thermal anneal is performed under: an environment of dinitrogen oxide; an annealing temperature at about 800° C.; and an annealing interval of about 40 sec to 2 min.
Claim 15
Dependent Claim
44 words
The method according to claim 1, the second tantalum oxide nitride layer is formed by performing a third rapid thermal anneal under: an environment of ammonia; an annealing temperature at about 800° C.; and an annealing interval of about 40 sec to 2 min.
Claim 16
Dependent Claim
25 words
The method according to claim 14, wherein the second tantalum oxide nitride layer is formed by reacting the second tantalum oxide layer with the ammonia.
Claim 17
Dependent Claim
14 words
The method according to claim 1, wherein the top electrode is a polysilicon layer.
Claim 18
Dependent Claim
14 words
The method according to claim 1, wherein the top electrode is a metal layer.
Claim 19
Dependent Claim
23 words
The method according to claim 1, wherein a metal layer is further included between the bottom electrode and the first tantalum oxide layer.
Claim 20
Independent Claim
70 words
A method for fabricating a capacitor in an integrated circuit, comprising: forming a bottom electrode on a substrate; forming a first tantalum oxide layer on the bottom electrode; converting the first tantalum oxide into a tantalum oxide nitride layer; forming a second tantalum oxide layer on the first tantalum oxide nitride layer; forming a second tantalum oxide nitride layer on the second tantalum oxide layer; and forming a top electrode.
Claim 21
Independent Claim
70 words
A method for fabricating a capacitor in an integrated circuit, comprising: forming a bottom electrode on a substrate; forming a first tantalum oxide layer on the bottom electrode; converting the first tantalum oxide into a tantalum oxide nitride layer; forming a second tantalum oxide layer on the first tantalum oxide nitride layer; forming a second tantalum oxide nitride layer on the second tantalum oxide layer; and forming a top electrode.
Claim 22
Independent Claim
60 words
A method for fabricating a capacitor in an integrated circuit, comprising: forming a bottom electrode on a substrate; forming a first tantalum oxide nitride layer on the bottom electrode; forming a first tantalum oxide layer on the first tantalum oxide nitride layer; forming a second tantalum oxide nitride layer on the first tantalum oxide layer; and forming a top electrode.
Claim 23
Independent Claim
60 words
A method for fabricating a capacitor in an integrated circuit, comprising: forming a bottom electrode on a substrate; forming a first tantalum oxide nitride layer on the bottom electrode; forming a first tantalum oxide layer on the first tantalum oxide nitride layer; forming a second tantalum oxide nitride layer on the first tantalum oxide layer; and forming a top electrode.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-12-05 | 2004-06-05 | 2004-12-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-05 | 2008-06-05 | 2008-12-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-05 | 2012-06-05 | 2012-12-05 | $7700.00 | Window Closed / Lapsed |