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Integrated SCR-LDMOS power device

Assignee: Texas Instruments Inc
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Filing: 1998-11-20
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Granted: 2000-10-24
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Expires: 2018-11-20
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Abstract

Abstract An integrated SCR-LDMOS device (10) having a p+ region (13) in the drain region (12), but otherwise similar to a conventional LDMOS transistor. The device (10) may be implemented as a modification of a non-planar LDMOS (FIGS. 1 and 2). An alternate embodiment, device (30), may be implemented as a modification of a planar LDMOS (FIG. 3). In either case, the added p+ region (13, 37) provides the device (10, 30) with two parasitic bipolar transistors in an SCR configuration (FIGS. 4A and 4B).

Inventors

  • 👤 Taylor Rice Efland
  • 👤 Stephen C. Kwan
  • 👤 Kenneth G. Buss
  • 👤 Chin-Yu Tsai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 15:28
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/101; H10D84/131; H10D84/138; H10D18/00; H10D18/251; H10D84/40; H10D84/401; H10D84/403

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 168 words
An integrated SCR-LDMOS device, comprising: a semiconductor layer of a first conductivity type; a second region of a second conductivity type opposite said first conductivity type formed as a well in said semiconductor layer; a third region of said first conductivity type formed as a well in said second region a source region of said second conductivity type formed in said third region; a drain region of said second conductivity type formed in said second region and spaced apart from said source region, such that a channel is formed between said source region and said drain region; a backgate region formed in said third region and adjacent said source region such that said source region separates said backgate region and said channel, said backgate region being of said first conductivity type; an anode region of said first conductivity type between said drain region and said channel region; a gate oxide layer over said channel; and a gate over at least part of said source region and said channel.
Claim 2
Dependent Claim 168 words
An integrated SCR-LDMOS device, comprising: a semiconductor layer of a first conductivity type; a second region of a second conductivity type opposite said first conductivity type formed as a well in said semiconductor layer; a third region of said first conductivity type formed as a well in said second region a source region of said second conductivity type formed in said third region; a drain region of said second conductivity type formed in said second region and spaced apart from said source region, such that a channel is formed between said source region and said drain region; a backgate region formed in said third region and adjacent said source region such that said source region separates said backgate region and said channel, said backgate region being of said first conductivity type; an anode region of said first conductivity type between said drain region and said channel region; a gate oxide layer over said channel; and a gate over at least part of said source region and said channel.
Claim 3
Dependent Claim 20 words
The device of claim 1, wherein said first conductivity type is p type and said second conductivity is n type.
Claim 4
Dependent Claim 33 words
The device of claim 1, wherein said semiconductor layer has a first sublayer having a first dopant concentration and a second sublayer having a second dopant concentration less than said first dopant concentration.
Claim 5
Dependent Claim 20 words
The device of claim 1, wherein said source region has a dopant concentration greater than that of said second region.
Claim 6
Dependent Claim 20 words
The device of claim 1, wherein said drain region has a dopant concentration greater than that of said second region.
Claim 7
Dependent Claim 16 words
The device of claim 1, wherein said second region is a low dopant concentration high-voltage region.
Claim 8
Dependent Claim 15 words
The device of claim 1, wherein said third region is a low dopant concentration region.
Claim 9
Dependent Claim 15 words
The device of claim 1, wherein said gate oxide layer is planar over said device.
Claim 10
Dependent Claim 22 words
The device of claim 1, wherein said gate oxide layer has thick field oxide regions between said channel and said drain region.
Claim 11
Dependent Claim 13 words
The device of claim 1, wherein said anode region touches said drain region.
Claim 12
Dependent Claim 28 words
The device of claim 1, further comprising shorting contacts between said source region and said backgate region and shorting contacts between said drain region and said anode region.
Claim 13
Dependent Claim 25 words
The device of claim 1, further comprising a well of said second conductivity type in which said drain region and said anode region are formed.
Claim 14
Dependent Claim 27 words
The device of claim 1, wherein said anode region has gaps such that current from said channel region to said drain region may flow through said gaps.
Claim 15
Dependent Claim 28 words
The device of claim 1, wherein said anode region has a predetermined width that determines the distance that current flows from said channel region to said drain region.

References Cited (Backward Citations)

US4928155A Cited
JPH05283622A Cited
US5925900A Cited
US5777365A Cited
US5773852A Cited
US5905288A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-10-24 2004-04-24 2004-10-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-10-24 2008-04-24 2008-10-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-10-24 2012-04-24 2012-10-24 $7700.00 Window Closed / Lapsed

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