US4928155A
Expired / Lapsed
US
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Lateral conductivity modulated MOSFET
Assignee: Toshiba Corp
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Filing: 1988-06-10
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Granted: 1990-05-22
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Expires: 2008-06-10
Abstract
Abstract A conductivity modulated MOSFET, having a semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type formed on the semiconductor substrate and having a high resistance, a base layer of the first conductivity type formed in the semiconductor layer, a source layer of the second conductivity type formed in the base layer, a gate electrode formed on a gate insulating film which is formed on a channel region, the channel region being formed in a surface of the base layer between the semiconductor layer and the source layer, a source electrode ohmic-contacting the source layer and the base layer, and a drain electrode formed on the surface of the semiconductor substrate opposite to the semiconductor layer, characterized in that the conductivity modulated MOSFET has a saturation current smaller than a latch-up current when a predetermined gate voltage is applied to the gate electrode.
Inventors
- 👤 Akio Nakagawa
- 👤 Hiromichi Ohashi
- 👤 Yoshihiro Yamaguchi
- 👤 Kiminori Watanabe
- 👤 Thuneo Thukakoshi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 05:20
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10D12/00; H10D12/411; H10D12/415; H10D12/441; H10D62/102; H10D62/103; H10D62/105; H10D62/106; H10D62/124; H10D62/126; H10D62/127
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
219 words
A lateral conductivity modulated metal oxide semiconductor field effect transistor, comprising: a semiconductor substrate; a high resistance semiconductor layer formed over said semiconductor substrate and having a high resistance; a semiconductor region of a first conductivity type formed in a surface of said high resistance semiconductor layer and having an impurity concentration higher than that of said high resistance semiconductor layer; a drain region of a second conductivity type formed and located in said semiconductor region; a base region of the second conductivity type formed in said surface of said high resistance semiconductor layer, said base region surrounding a window of said high resistance semiconductor layer which is in said surface; a source region of the first conductivity type formed and located in said base region; a gate insulating film formed on a channel region which is formed in a surface of said base region between said semiconductor region and said source region; a gate electrode formed on said gate insulating film and extending over said high resistance semiconductor layer; a source electrode ohmicly contacting said source region and said base region; and a drain electrode ohmicly contacting said drain region, whereby said lateral conductivity modulated metal oxide semiconductor field effect transistor can be operated under such conditions wherein a latch up current is larger than a saturation current.
Claim 2
Dependent Claim
219 words
A lateral conductivity modulated metal oxide semiconductor field effect transistor, comprising: a semiconductor substrate; a high resistance semiconductor layer formed over said semiconductor substrate and having a high resistance; a semiconductor region of a first conductivity type formed in a surface of said high resistance semiconductor layer and having an impurity concentration higher than that of said high resistance semiconductor layer; a drain region of a second conductivity type formed and located in said semiconductor region; a base region of the second conductivity type formed in said surface of said high resistance semiconductor layer, said base region surrounding a window of said high resistance semiconductor layer which is in said surface; a source region of the first conductivity type formed and located in said base region; a gate insulating film formed on a channel region which is formed in a surface of said base region between said semiconductor region and said source region; a gate electrode formed on said gate insulating film and extending over said high resistance semiconductor layer; a source electrode ohmicly contacting said source region and said base region; and a drain electrode ohmicly contacting said drain region, whereby said lateral conductivity modulated metal oxide semiconductor field effect transistor can be operated under such conditions wherein a latch up current is larger than a saturation current.
Claim 3
Dependent Claim
17 words
The transistor according to claim 1, wherein said window is constructed of at least two parallel sides.
Claim 4
Dependent Claim
16 words
The transistor according to claim 2, wherein said semiconductor substrate is of the first conductivity type.
Claim 5
Dependent Claim
16 words
The transistor according to claim 2, wherein said semiconductor substrate is of the second conductivity type.
Claim 6
Dependent Claim
157 words
A lateral conductivity modulated metal oxide semiconductor field effect transistor, comprising: a semiconductor region of a first conductivity type having a window in a device surface; a drain region of a second conductivity type which is formed and located in said semiconductor region; a source region of the first conductivity type; a base region of the second conductivity type contacting and completely surrounding said source region; a gate insulating film formed on a channel region which is formed in a surface of said base region between said semiconductor region and said source region; a gate electrode formed on said gate insulating, film and extending over said semiconductor region; a source electrode ohmicly contacting said source region and said base region; and a drain electrode ohmicly contacting said drain region, whereby said lateral conductivity modulated metal oxide semiconductor field effect transistor can be operated under such conditions wherein a latch up current is larger than a saturation current.
Claim 7
Dependent Claim
157 words
A lateral conductivity modulated metal oxide semiconductor field effect transistor, comprising: a semiconductor region of a first conductivity type having a window in a device surface; a drain region of a second conductivity type which is formed and located in said semiconductor region; a source region of the first conductivity type; a base region of the second conductivity type contacting and completely surrounding said source region; a gate insulating film formed on a channel region which is formed in a surface of said base region between said semiconductor region and said source region; a gate electrode formed on said gate insulating, film and extending over said semiconductor region; a source electrode ohmicly contacting said source region and said base region; and a drain electrode ohmicly contacting said drain region, whereby said lateral conductivity modulated metal oxide semiconductor field effect transistor can be operated under such conditions wherein a latch up current is larger than a saturation current.
Claim 8
Dependent Claim
17 words
The transistor according to claim 5, wherein said base region surrounds said window of said semiconductor region.
References Cited (Backward Citations)
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