Patent US6127702A successfully refreshed from Google Patents.
US6127702A
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Semiconductor device having an SOI structure and manufacturing method therefor
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1997-09-16
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Granted: 2000-10-03
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Expires: 2017-09-16
Abstract
Abstract A fine semiconductor device having a short channel length while suppressing a short channel effect. Linearly patterned or dot-patterned impurity regions 104 are formed in a channel forming region 103 so as to be generally parallel with the channel direction. The impurity regions 104 are effective in suppressing the short channel effects. More specifically, the impurity regions 104 suppress expansion of a drain-side depletion layer, so that the punch-through phenomenon can be prevented. Further, the impurity regions cause a narrow channel effect, so that reduction in threshold voltage can be lessened.
Inventors
- 👤 Shunpei Yamazaki
- 👤 Hisashi Ohtani
- 👤 Jun Koyama
- 👤 Takeshi Fukunaga
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 12:30
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6757; B; B82; B82Y; B82Y10/00; H10D30/01; H10D30/014; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6744; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D86/00; H10D86/01; H10D86/201
Claims Analysis
Total Claims: 40
Claim 1
Independent Claim
111 words
An insulated-gate semiconductor device having an SOI structure, said device comprising: a source region, a drain region and a channel forming region which are formed by using a crystalline semiconductor formed on an insulative substrate or an insulating layer; and a gate insulating film and a gate electrode formed on the channel forming region, said channel forming region comprising: carrier moving regions; and impurity regions formed artificially and locally for pinning of a depletion layer developing from the drain region toward the channel forming region and the source region, said impurity regions containing an impurity element for shifting an energy band in such a direction that movement of electrons is obstructed.
Claim 2
Dependent Claim
111 words
An insulated-gate semiconductor device having an SOI structure, said device comprising: a source region, a drain region and a channel forming region which are formed by using a crystalline semiconductor formed on an insulative substrate or an insulating layer; and a gate insulating film and a gate electrode formed on the channel forming region, said channel forming region comprising: carrier moving regions; and impurity regions formed artificially and locally for pinning of a depletion layer developing from the drain region toward the channel forming region and the source region, said impurity regions containing an impurity element for shifting an energy band in such a direction that movement of electrons is obstructed.
Claim 3
Dependent Claim
151 words
An insulated-gate semiconductor device having an SOI structure, said device comprising: a single crystal semiconductor substrate; an insulating layer in the single crystal substrate; a crystalline semiconductor on the insulating layer; a source region, a drain region, and a channel forming region being formed in the crystalline semiconductor, each of the source and drain regions including a first impurity; and a gate insulating film and a gate electrode being formed on the channel forming region, said channel forming region comprising: a plurality of carrier moving regions; and a plurality of impurity regions being formed artificially and locally for pinning of a depletion layer developing from the drain region toward the channel forming region and the source region, said impurity regions including a second impurity for shifting an energy band in such a direction that movement of holes is obstructed, wherein the second impurity has an opposite conductivity to the first impurity.
Claim 4
Dependent Claim
151 words
An insulated-gate semiconductor device having an SOI structure, said device comprising: a single crystal semiconductor substrate; an insulating layer in the single crystal substrate; a crystalline semiconductor on the insulating layer; a source region, a drain region, and a channel forming region being formed in the crystalline semiconductor, each of the source and drain regions including a first impurity; and a gate insulating film and a gate electrode being formed on the channel forming region, said channel forming region comprising: a plurality of carrier moving regions; and a plurality of impurity regions being formed artificially and locally for pinning of a depletion layer developing from the drain region toward the channel forming region and the source region, said impurity regions including a second impurity for shifting an energy band in such a direction that movement of holes is obstructed, wherein the second impurity has an opposite conductivity to the first impurity.
Claim 5
Dependent Claim
100 words
An insulated-gate semiconductor device having an SOI structure, said device comprising: a source region, a drain region and a channel forming region which are formed by using a crystalline semiconductor formed on an insulative substrate or an insulating layer; and a gate insulating film and a gate electrode formed on the channel forming region, said channel forming region comprising: carrier moving regions; and impurity regions formed artificially and locally by adding an impurity element to control a threshold voltage to a given value, said impurity element shifting an energy band in such a direction that movement of electrons is obstructed.
Claim 6
Dependent Claim
100 words
An insulated-gate semiconductor device having an SOI structure, said device comprising: a source region, a drain region and a channel forming region which are formed by using a crystalline semiconductor formed on an insulative substrate or an insulating layer; and a gate insulating film and a gate electrode formed on the channel forming region, said channel forming region comprising: carrier moving regions; and impurity regions formed artificially and locally by adding an impurity element to control a threshold voltage to a given value, said impurity element shifting an energy band in such a direction that movement of electrons is obstructed.
Claim 7
Dependent Claim
140 words
An insulated-gate semiconductor device having an SOI structure, said device comprising: a single crystal semiconductor substrate; an insulating layer in the single crystal substrate; a crystalline semiconductor on the insulating layer; a source region, a drain region and a channel forming region being formed in the crystalline semiconductor, each of the source and drain regions including a first impurity; and a gate insulating film and a gate electrode being formed on the channel forming region, said channel forming region comprising: a plurality of carrier moving regions; and a plurality of impurity regions being formed artificially and locally by adding a second impurity to control a threshold voltage to a given value, said second impurity shifting an energy band in such a direction that movement of holes is obstructed, wherein the second impurity has an opposite conductivity to the first impurity.
Claim 8
Dependent Claim
140 words
An insulated-gate semiconductor device having an SOI structure, said device comprising: a single crystal semiconductor substrate; an insulating layer in the single crystal substrate; a crystalline semiconductor on the insulating layer; a source region, a drain region and a channel forming region being formed in the crystalline semiconductor, each of the source and drain regions including a first impurity; and a gate insulating film and a gate electrode being formed on the channel forming region, said channel forming region comprising: a plurality of carrier moving regions; and a plurality of impurity regions being formed artificially and locally by adding a second impurity to control a threshold voltage to a given value, said second impurity shifting an energy band in such a direction that movement of holes is obstructed, wherein the second impurity has an opposite conductivity to the first impurity.
Claim 9
Dependent Claim
30 words
An insulated-gate semiconductor device according to any one of claims 1 and 3 wherein said impurity element is for forming a built-in potential difference locally in the channel forming region.
Claim 10
Dependent Claim
18 words
An insulated-gate semiconductor device according to claim 1 or 3 wherein said impurity element belongs to group 13.
Claim 11
Dependent Claim
14 words
An insulated-gate semiconductor device according to claim 6 wherein said impurity element is boron.
Claim 12
Dependent Claim
18 words
An insulated-gate semiconductor device according to claim 2 or 4 wherein said second impurity belongs to group 15.
Claim 13
Dependent Claim
16 words
An insulated-gate semiconductor device according to claim 8 wherein said second impurity is phosphorus or arsenic.
Claim 14
Dependent Claim
23 words
An insulated-gate semiconductor device according to any one of claims 1 to 4 wherein said carrier moving regions are intrinsic or substantially intrinsic.
Claim 15
Dependent Claim
62 words
An insulated-gate semiconductor device according to claim 10 wherein said substantially intrinsic regions mean regions in which in the vicinity of a surface of the crystalline semiconductor a concentration of an impurity element for imparting one type of conductivity to the crystalline semiconductor is less than 5×10 15 atoms/cm 3 and an oxygen concentration is less than 2×10 18 atoms/cm 3 .
Claim 16
Dependent Claim
62 words
An insulated-gate semiconductor device according to claim 10 wherein said substantially intrinsic regions mean regions in which in the vicinity of a surface of the crystalline semiconductor a concentration of an impurity element for imparting one type of conductivity to the crystalline semiconductor is less than 5×10 15 atoms/cm 3 and an oxygen concentration is less than 1×10 17 atoms/cm 3 .
Claim 17
Dependent Claim
63 words
An insulated-gate semiconductor device according to any one of claims 1 to 4 wherein a width W of the channel forming region, a total width W pi of the impurity regions, and a total width W pa of regions between the impurity regions satisfy relationships W pi /W=0.1 to 0.9, W pa /W=0.1 to 0.9, and W pi /W pa =1/9 to 9.
Claim 18
Dependent Claim
56 words
An insulated-gate semiconductor device according to any one of claims 1 to 4 wherein in at least one cross-section taken by cutting the channel forming region in a direction perpendicular to a channel direction, the channel forming region is substantially regarded as a collection of a plurality of channel forming regions sectioned by the impurity regions.
Claim 19
Dependent Claim
53 words
An insulated-gate semiconductor device according to any one of claims 1 to 4 wherein a reduction in threshold voltage caused by a short channel effect occurring in the channel forming region during driving is compensated by an increase in threshold voltage caused by a narrow channel effect obtained by utilizing the impurity regions.
Claim 20
Dependent Claim
29 words
An insulated-gate semiconductor device according to any one of claims 1 to 4 wherein the impurity regions serve as regions for buffering stress that occurs in the crystalline semiconductor.
Claim 21
Dependent Claim
31 words
An insulated-gate semiconductor device according to any one of claims 1 to 4 wherein a total width of the carrier moving regions is within a range of 30 to 3,000 Å.
Claim 22
Dependent Claim
20 words
An insulated-gate semiconductor device according to any one of claims 1 to 4 wherein said impurity regions have dot patterns.
Claim 23
Dependent Claim
26 words
An insulated-gate semiconductor device according to any one of claims 1 to 4 wherein said impurity regions have linear patterns substantially parallel with a channel direction.
Claim 24
Dependent Claim
24 words
An insulated-gate semiconductor device according to claim 3 or 4 wherein said threshold voltage is controlled by controlling widths of the carrier moving regions.
Claim 25
Independent Claim
68 words
The device of any one of claims 1 through 4 in combination with at least an electric apparatus selected from the group consisting of a liquid crystal display device, an EL display device, a CL display device, a TV camera, a personal computer, a car navigation apparatus, a TV projection apparatus, a video camera, and a portable information terminal apparatus including a cellular telephone and a mobile computer.
Claim 26
Independent Claim
32 words
A device according to any one of claims 1 and 3 wherein said impurity element in said impurity regions is at a concentration of 1×10 17 to 1×10 20 atoms/cm 3 .
Claim 27
Independent Claim
27 words
A device according to any of claims 2 and 4, wherein the second impurity is for forming a built-in potential difference locally in the channel forming region.
Claim 28
Independent Claim
32 words
A device according to any one of claims 2 and 4, wherein the second impurity in the impurity regions is at a concentration of 1×10 17 to 1×10 20 atoms/cm 3 .
Claim 29
Dependent Claim
115 words
An insulating gate semiconductor device having an SOI structure, said device comprising: a single crystal semiconductor substrate; an insulating layer in the single crystal substrate; a single crystal semiconductor layer on the insulating layer; a source region, a drain region, and a channel forming region being formed in the single crystal semiconductor layer, each of the source and drain regions including a first impurity; and a gate electrode being formed over the channel forming region with a gate insulating film therebetween, said channel forming region comprising: a plurality of carrier moving regions; and a plurality of impurity regions each including a second impurity, wherein the second impurity has an opposite conductivity to the first impurity.
Claim 30
Dependent Claim
115 words
An insulating gate semiconductor device having an SOI structure, said device comprising: a single crystal semiconductor substrate; an insulating layer in the single crystal substrate; a single crystal semiconductor layer on the insulating layer; a source region, a drain region, and a channel forming region being formed in the single crystal semiconductor layer, each of the source and drain regions including a first impurity; and a gate electrode being formed over the channel forming region with a gate insulating film therebetween, said channel forming region comprising: a plurality of carrier moving regions; and a plurality of impurity regions each including a second impurity, wherein the second impurity has an opposite conductivity to the first impurity.
Claim 31
Dependent Claim
36 words
A device according to claim 25, wherein the insulated gate semiconductor device is an n-type insulated gate field effect transistor, wherein the first impurity is an n-type impurity while the second impurity is a p-type impurity.
Claim 32
Dependent Claim
32 words
A device according to claim 25, wherein the insulated gate semiconductor device is an n-type insulated gate field effect transistor, wherein the first impurity comprises phosphorus while the second impurity comprises boron.
Claim 33
Dependent Claim
36 words
A device according to claim 25, wherein the insulated gate semiconductor device is a p-type insulated gate field effect transistor, wherein the first impurity is a p-type impurity while the second impurity is an n-type impurity.
Claim 34
Dependent Claim
43 words
A device according to claim 25, wherein the insulated gate semiconductor device is a p-type insulated gate field effect transistor, wherein the first impurity comprises boron while the second impurity comprises at least one selected from the group consisting of phosphorus and arsenic.
Claim 35
Dependent Claim
29 words
A device according to claim 25, wherein the second impurity in the plurality of impurity regions is at a concentration of 1×10 17 to 1×10 20 atoms/cm 3 .
Claim 36
Dependent Claim
58 words
A device according to claim 25, wherein a width W of the channel forming region, a total width W pi of the impurity regions, and a total width W pa of regions between the plurality of impurity regions satisfy relationships W pi /W=0.1 to 0.9, W pa /W=0.1 to 0.9, and W pi /W pa =1/9 to 9.
Claim 37
Dependent Claim
26 words
A device according to claim 25, wherein a total width of the plurality of carrier moving regions is within a range of 30 to 3,000 Å.
Claim 38
Dependent Claim
18 words
A device according to claim 25, wherein each of the plurality of impurity regions has a dot pattern.
Claim 39
Dependent Claim
24 words
A device according to claim 25, wherein each of the plurality of impurity regions has a linear pattern being parallel with a channel direction.
Claim 40
Dependent Claim
63 words
The device of claim 25 in combination with at least an electric apparatus selected from the group consisting of a liquid crystal display device, an EL display device, a CL display device, a TV camera, a personal computer, a car navigation apparatus, a TV projection apparatus, a video camera, and a portable information terminal apparatus including a cellular telephone and a mobile computer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-10-03 | 2004-04-03 | 2004-10-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-10-03 | 2008-04-03 | 2008-10-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-10-03 | 2012-04-03 | 2012-10-03 | $7700.00 | Window Closed / Lapsed |