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US6121083A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device and method of fabricating the same

Assignee: Renesas Electronics Corp
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Filing: 1998-08-14
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Granted: 2000-09-19
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Expires: 2018-08-14
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Abstract

Abstract There is provided a semiconductor device including (a) a semiconductor substrate, (b) a capacity device, (c) an interlayer insulating layer formed between the semiconductor substrate and the capacity device for electrically isolating them with each other, the interlayer insulating layer being formed below the capacity device with a contact hole therethrough, (d) a contact plug composed of an electrically conductive material and formed in the contact hole, (e) a first film composed of a first material through which hydrogen is not allowed to pass, and formed between the interlayer insulating layer and capacity device, (f) a second film composed of a second material through which hydrogen is not allowed to pass, and formed on an inner wall of the contact hole, (g) a third film composed of a third material through which hydrogen is not allowed to pass, and formed to cover an upper surface of the capacity device therewith, and (h) a fourth film composed of a fourth material through which hydrogen is not allowed to pass, and formed to cover a side surface of the capacity device therewith. The first, second, third, and fourth materials are silicon nitride, for instance. Since a capacity device having a capacitive film composed of metal oxide readily reduced by hydrogen is entirely covered with first to fourth films, which are composed of silicon nitride, for instance, it is possible to avoid the capacitive film from being reduced, which ensures that the capacitive film is not deteriorated.

Inventors

  • 👤 Takeo Matsuki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 09:16
CPC Classifications
H; H10; H10B; H10B53/00; H10B53/30; H10D; H10D1/00; H10D1/60; H10D1/68; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/074; H10W20/076; H10W42/00; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10P; H10P50/00; H10P50/73

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 293 words
A method of fabricating a semiconductor device, comprising the steps of: (a) forming a multi-layered interlayer insulating film on a semiconductor substrate, said multi-layered interlayer insulating film including a first film, as an uppermost film, composed of a first material through which hydrogen is not allowed to pass; (b) forming a plurality of contact holes in a row through said multi-layered interlayer insulating film to said semiconductor substrate; (c) forming a second film on an inner wall of said contact holes, said second film being composed of a second material through which hydrogen is not allowed to pass; (d) forming a plug layer in said contact holes, said plug layer being composed of an electrically conductive material; (e) forming a lower electrode on said semiconductor substrate over said plug layer in such a manner that said lower electrode is more extensive than a cross-section of said contact holes; (f) forming a capacitive film entirely covering said lower electrode therewith and further covering said first film therewith; (g) forming an upper electrode over said capacitive film; (h) forming a third film on said upper electrode; (i) etching said third film in such a manner that an end surface of said third film, a side surface of said upper electrode, a side surface of said capacitive film, and said first film are exposed, and that said upper electrode is co-owned by a plurality of said lower electrodes, said third film being composed of a third material through which hydrogen is not allowed to pass; and (j) forming a fourth film covering both said end surface of said third film and said side surface of said capacitive film therewith, said fourth film being composed of a fourth material through which hydrogen is not allowed to pass.
Claim 2
Independent Claim 293 words
A method of fabricating a semiconductor device, comprising the steps of: (a) forming a multi-layered interlayer insulating film on a semiconductor substrate, said multi-layered interlayer insulating film including a first film, as an uppermost film, composed of a first material through which hydrogen is not allowed to pass; (b) forming a plurality of contact holes in a row through said multi-layered interlayer insulating film to said semiconductor substrate; (c) forming a second film on an inner wall of said contact holes, said second film being composed of a second material through which hydrogen is not allowed to pass; (d) forming a plug layer in said contact holes, said plug layer being composed of an electrically conductive material; (e) forming a lower electrode on said semiconductor substrate over said plug layer in such a manner that said lower electrode is more extensive than a cross-section of said contact holes; (f) forming a capacitive film entirely covering said lower electrode therewith and further covering said first film therewith; (g) forming an upper electrode over said capacitive film; (h) forming a third film on said upper electrode; (i) etching said third film in such a manner that an end surface of said third film, a side surface of said upper electrode, a side surface of said capacitive film, and said first film are exposed, and that said upper electrode is co-owned by a plurality of said lower electrodes, said third film being composed of a third material through which hydrogen is not allowed to pass; and (j) forming a fourth film covering both said end surface of said third film and said side surface of said capacitive film therewith, said fourth film being composed of a fourth material through which hydrogen is not allowed to pass.
Claim 3
Dependent Claim 60 words
The method as set forth in claim 1, wherein said step (c) includes: (c-1) forming said second film over said semiconductor substrate so that an inner wall of said contact holes is covered with said second film; and (c-2) etching said second film back so that only a portion of said second film deposited on said semiconductor substrate is removed.
Claim 4
Dependent Claim 61 words
The method as set forth in claim 1, wherein said step (j) includes: (j-1) depositing said fourth film over said capacitive film and said first film; and (j-2) etching said fourth and first films so that an upper surface and said end surface of said third film, and said side surface of said capacitive film are covered with said fourth film.
Claim 5
Dependent Claim 19 words
The method as set forth in claim 1, wherein said first, second, third, and fourth materials are the same.
Claim 6
Dependent Claim 18 words
The method as set forth in claim 4, wherein said first, second, third, and fourth materials are nitride.
Claim 7
Dependent Claim 19 words
The method as set forth in claim 5, wherein said first, second, third, and fourth materials are silicon nitride.
Claim 8
Dependent Claim 17 words
The method as set forth in claim 3, wherein said capacitive film is composed of tantalum oxide.
Claim 9
Dependent Claim 20 words
The method as set forth in claim 3, wherein said capacitive film is composed of high dielectric or ferroelectric substance.
Claim 10
Dependent Claim 37 words
The method as set forth in claim 1, wherein said contact holes is formed in said step (b) so as to electrically connect said capacitive film to a source or drain region formed in said semiconductor substrate.

References Cited (Backward Citations)

JPH02232961A Cited
US5330614A Cited
US5464793A Cited
US5335138A Cited
JPH0738068A Cited
US5459345A Cited
US5567964A Cited
US5612574A Cited
JPH09116123A Cited
US5854104A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-09-19 2004-03-20 2004-09-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-09-19 2008-03-20 2008-09-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-09-19 2012-03-20 2012-09-19 $7700.00 Window Closed / Lapsed

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