← Back to Patent Explorer
US5854104A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for fabricating nonvolatile semiconductor memory device having a ferroelectric capacitor

Assignee: Sharp Corp
•
Filing: 1997-01-30
•
Granted: 1998-12-29
•
Expires: 2017-01-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A process for fabricating a nonvolatile semiconductor memory device has one transistor and one ferroelectric capacitor electrically connected to each other by a contact plug, which comprising forming a transistor; forming an inter-layer insulating film, at least an upper surface portion thereof being a titanium oxide film; forming a capacitor lower electrode; and forming a capacitor insulating film and a capacitor upper electrode, wherein the lower electrode forming step comprises: depositing a titanium nitride film and a platinum film on the titanium oxide film; etching the platinum film with a first etching gas adapted to suppress deposition of substances including platinum; and etching the titanium nitride film with a second etching gas having a high etching selectivity to the titanium oxide film.

Inventors

  • 👤 Shigeo Onishi
  • 👤 Takao Kinoshita
  • 👤 Jun Kudo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 12:44
CPC Classifications
H; H10; H10B; H10B12/00; C; C23; C23F; C23F4/00; H10B53/00; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10P; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 122 words
A process for fabricating a nonvolatile semiconductor memory device having one transistor and one ferroelectric capacitor electrically connected to each other by a contact plug, which comprising forming a transistor; forming an inter-layer insulating film, at least an upper surface portion thereof being a titanium oxide film; forming a capacitor lower electrode; and forming a capacitor insulating film and a capacitor upper electrode, wherein the lower electrode forming step comprises: depositing a titanium nitride film and a platinum film on the titanium oxide film; etching the platinum film with a first etching gas adapted to suppress deposition of substances including platinum; and etching the titanium nitride film with a second etching gas having a high etching selectivity to the titanium oxide film.
Claim 2
Dependent Claim 122 words
A process for fabricating a nonvolatile semiconductor memory device having one transistor and one ferroelectric capacitor electrically connected to each other by a contact plug, which comprising forming a transistor; forming an inter-layer insulating film, at least an upper surface portion thereof being a titanium oxide film; forming a capacitor lower electrode; and forming a capacitor insulating film and a capacitor upper electrode, wherein the lower electrode forming step comprises: depositing a titanium nitride film and a platinum film on the titanium oxide film; etching the platinum film with a first etching gas adapted to suppress deposition of substances including platinum; and etching the titanium nitride film with a second etching gas having a high etching selectivity to the titanium oxide film.
Claim 3
Dependent Claim 21 words
A process as set forth in claim 1, wherein the first etching gas contains a chlorine-based gas and a fluorine-based gas.
Claim 4
Dependent Claim 41 words
A process as set forth in claim 2, wherein the first etching gas contains chlorine gas, and C n F 2n+2 (n: a natural number), CHF 3 or SiF 4 gas in a volume ratio of about 4/1 to about 1/1.
Claim 5
Dependent Claim 24 words
A process as set forth in claim 1, wherein the second etching gas contains a chlorine-based gas or a fluorine-based gas and oxygen gas.
Claim 6
Dependent Claim 33 words
A process as set forth in claim 4, wherein the second etching gas contains chlorine gas or SF 6 gas, and oxygen gas in a volume ratio of about 50/1 to about 5/1.
Claim 7
Dependent Claim 118 words
A process as set forth in claim 1, wherein the capacitor insulating film/upper electrode forming step comprises: (i) depositing a ferroelectric film, a platinum film, a titanium nitride film and an aluminum film over the entire surface of the inter-layer insulating film including the capacitor lower electrode; (ii) etching the aluminum film and the titanium nitride film with a third etching gas, and etching the platinum film with a fourth etching gas adapted to suppress deposition of substances including platinum for formation of the capacitor upper electrode; and (iii) etching the ferroelectric film with a fifth etching gas less reactive to aluminum by employing the resulting upper electrode as a mask for formation of the capacitor insulating film.
Claim 8
Dependent Claim 19 words
A process as set forth in claim 6, wherein the third etching gas in step (ii) is chlorine gas.
Claim 9
Dependent Claim 24 words
A process as set forth in claim 6, wherein the forth etching gas in step (ii) contains a chlorine-based gas and a fluorine-based gas.
Claim 10
Dependent Claim 42 words
A process as set forth in claim 8, wherein the forth etching gas contains chlorine gas, and C n F 2n+2 (n: a natural number) , CHF 3 or SiF 4 gas in a volume ratio of about 4/1 to about 1/1.
Claim 11
Dependent Claim 26 words
A process as set forth in claim 6, wherein the fifth etching gas in step (iii) contains CF 4 or SF 6 gas, and oxygen gas.
Claim 12
Dependent Claim 35 words
A process as set forth in claim 10, wherein CF 4 or SF 6 gas, and oxygen gas are contained in the fifth etching gas in a volume ratio of about 10/1 to about 3/1.
Claim 13
Dependent Claim 88 words
A process as set forth in claim 1, wherein a contact plug is formed by opening a contact hole in the inter-layer insulating film, depositing a titanium film and a titanium nitride film sequentially over the inter-layer insulating film including the contact hole, depositing a tungsten film on the titanium nitride film so as to fill the contact hole, and etching back the titanium film, the titanium nitride film and the tungsten film by a CMP method to such an extent that the inter-layer insulating film is exposed.

References Cited (Backward Citations)

US5046043A Cited
US5350705A Cited
US5407855A Cited
US5418388A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-12-28 2002-06-29 2002-12-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-12-28 2006-06-29 2006-12-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-12-28 2010-06-29 2010-12-29 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag