US6104069A
Expired / Lapsed
US
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Semiconductor device having an elevated active region formed in an oxide trench
Assignee: Lone Star Silicon Innovations LLC
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Filing: 1998-11-04
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Granted: 2000-08-15
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Expires: 2018-11-04
Abstract
Abstract A process for forming a semiconductor device having an elevated active region is disclosed. The process includes forming a plurality of gate electrodes on the semiconductor substrate and disposing a thick oxide layer over the gate electrodes. A trench is formed in a thick oxide layer and is filled with a polysilicon material. The polysilicon material is subsequently doped in order to form an elevated active region above an active region of the substrate.
Inventors
- 👤 Michael Duane
- 👤 Daniel Kadosh
- 👤 Mark I. Gardner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 05:11
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0223; H10D30/60; H10D30/601; H10D30/67; H10D30/6729; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10D30/0212; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
88 words
A semiconductor device manufactured according to the process of: forming a plurality of gate electrodes on a substrate, an active region of the substrate being defined by adjacent walls of two gate electrodes; forming an insulating layer over the gate electrodes and the active region; etching a trench in the insulating layer to expose a portion of the active region of the substrate; filling the trench with a polysilicon material; and doping the polysilicon material to form an elevated active region above the active region of the substrate.
Claim 2
Dependent Claim
88 words
A semiconductor device manufactured according to the process of: forming a plurality of gate electrodes on a substrate, an active region of the substrate being defined by adjacent walls of two gate electrodes; forming an insulating layer over the gate electrodes and the active region; etching a trench in the insulating layer to expose a portion of the active region of the substrate; filling the trench with a polysilicon material; and doping the polysilicon material to form an elevated active region above the active region of the substrate.
Claim 3
Dependent Claim
33 words
A semiconductor device according to claim 1, wherein the doping of the polysilicon material includes diffusing the dopant through the polysilicon material to dope a region in the active region of the substrate.
Claim 4
Dependent Claim
64 words
A semiconductor device according to claim 1, wherein the process further includes: implanting a first dopant into the active region of the substrate prior to forming the insulating layer to form an LDD region in the active region of the substrate; and implanting a second dopant using the trench as a pattern to form a source/drain region in the active region of the substrate.
Claim 5
Dependent Claim
79 words
A semiconductor device, comprising: a substrate; first and second gate electrodes disposed on the substrate and having adjacent walls defining therebetween a first region of the substrate; an insulating layer defining a trench between the first and second gate electrodes over the first region of the substrate; an elevated doped polysilicon layer disposed in the trench forming an elevated active region; and an active region formed in the first region of the substrate beneath the elevated doped polysilicon layer.
Claim 6
Dependent Claim
79 words
A semiconductor device, comprising: a substrate; first and second gate electrodes disposed on the substrate and having adjacent walls defining therebetween a first region of the substrate; an insulating layer defining a trench between the first and second gate electrodes over the first region of the substrate; an elevated doped polysilicon layer disposed in the trench forming an elevated active region; and an active region formed in the first region of the substrate beneath the elevated doped polysilicon layer.
Claim 7
Dependent Claim
26 words
A device as recited in claim 4, wherein the active region in the first region of the substrate comprises a source/drain region of the semiconductor device.
Claim 8
Dependent Claim
35 words
A device as recited in claim 4, wherein the active region in the first region of the substrate comprises a source/drain of the semiconductor device and the elevated active region comprises an elevated source/drain region.
Claim 9
Dependent Claim
21 words
A device as recited in claim 4, further comprising a silicide layer disposed on a surface of the elevated active region.
Claim 10
Dependent Claim
29 words
A device as recited in claim 4, further comprising a silicide layer disposed on a surface of the gate electrodes and on a surface of the elevated active region.
Claim 11
Dependent Claim
23 words
A device as recited in claim 4, wherein the insulating layer has a thickness of about twice a thickness of the gate electrodes.
Claim 12
Dependent Claim
22 words
A device as recited in claim 4, wherein the insulating layer has a thickness greater than a thickness of the gate electrodes.
Claim 13
Dependent Claim
26 words
A device as recited in claim 4, wherein portions of the insulating layer are disposed between edges of the trench and sidewalls of the gate electrodes.
Claim 14
Dependent Claim
39 words
A device as recited in claim 4, wherein the active region in the first region of the substrate includes a lightly-doped region and a heavily-doped region, the lightly-doped region being located further from the trench than the heavily-doped region.
Claim 15
Dependent Claim
113 words
A semiconductor device, comprising: a substrate; a plurality of gate electrodes disposed over the substrate, a common active region of the substrate being defined by adjacent walls of two gate electrodes; an oxide layer having a thickness greater than a thickness of the gate electrodes disposed over the gate electrodes and the active region, wherein the oxide layer defines a trench between the two gate electrodes over the active region of the substrate, wherein a portion of the insulating layer separates the trench from the walls of the two gate electrodes; and an elevated doped polysilicon layer disposed in the trench forming an elevated active region over the active region of the substrate.
Claim 16
Dependent Claim
113 words
A semiconductor device, comprising: a substrate; a plurality of gate electrodes disposed over the substrate, a common active region of the substrate being defined by adjacent walls of two gate electrodes; an oxide layer having a thickness greater than a thickness of the gate electrodes disposed over the gate electrodes and the active region, wherein the oxide layer defines a trench between the two gate electrodes over the active region of the substrate, wherein a portion of the insulating layer separates the trench from the walls of the two gate electrodes; and an elevated doped polysilicon layer disposed in the trench forming an elevated active region over the active region of the substrate.
Claim 17
Dependent Claim
23 words
A device as recited in claim 13, wherein the thickness of the insulating layer is about twice the thickness of the gate electrodes.
Claim 18
Dependent Claim
20 words
A device as recited in claim 13, wherein the common active region includes a source/drain region of the semiconductor device.
Claim 19
Dependent Claim
29 words
A device as recited in claim 13, wherein the common active region includes a source/drain of the semiconductor device and the elevated active region comprises an elevated source/drain region.
Claim 20
Dependent Claim
33 words
A device as recited in claim 13, wherein the common active region includes a lightly-doped region and a heavily-doped region, the lightly-doped region being located further from the trench than the heavily-doped region.
Claim 21
Dependent Claim
21 words
A device as recited in claim 13, further comprising a silicide layer disposed on a surface of the elevated active region.
Claim 22
Dependent Claim
29 words
A device as recited in claim 13, further comprising a silicide layer disposed on a surface of the gate electrodes and on a surface of the elevated active region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-08-15 | 2004-02-14 | 2004-08-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-08-15 | 2008-02-14 | 2008-08-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-08-15 | 2012-02-14 | 2012-08-15 | $7700.00 | Window Closed / Lapsed |