← Back to Patent Explorer
US5124276A Expired / Lapsed US ⏱️ 0.0 years remaining

Filling contact hole with selectively deposited EPI and poly silicon

Assignee: Toshiba Corp
•
Filing: 1991-07-02
•
Granted: 1992-06-23
•
Expires: 2011-07-02
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device includes a semiconductor layer, an insulating layer on the semiconductor layer, including a discontinuity therein, a monocrystalline silicon layer on a portion of semiconductor layer defined by the discontinuity, a non-monocrystalline silicon layer on the monocrystalline silicon layer, and a wiring layer on the non-monocrystalline silicon layer.

Inventors

  • 👤 Shuichi Samata
  • 👤 Yoshiaki Matsushita

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 15:28
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; Y; Y10; Y10S; Y10S148/00; Y10S148/026; Y10S148/164

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 72 words
A method of manufacturing a semiconductor device having a wiring contact portion, comprising the steps of: providing a semiconductor layer; forming an insulating layer on the semiconductor layer; forming an opening in a portion of the insulating layer; selectively forming a monocrystalline silicon layer in the opening of the insulating layer; selectively forming a non-monocrystalline silicon layer on the monocrystalline silicon layer; and forming a wiring layer on the non-monocrystalline silicon layer.
Claim 2
Independent Claim 72 words
A method of manufacturing a semiconductor device having a wiring contact portion, comprising the steps of: providing a semiconductor layer; forming an insulating layer on the semiconductor layer; forming an opening in a portion of the insulating layer; selectively forming a monocrystalline silicon layer in the opening of the insulating layer; selectively forming a non-monocrystalline silicon layer on the monocrystalline silicon layer; and forming a wiring layer on the non-monocrystalline silicon layer.
Claim 3
Independent Claim 100 words
A method of manufacturing a semiconductor device having a wiring contact portion, comprising the steps of: providing a semiconductor layer of first conductivity type; forming an impurity layer of second conductivity type in a surface area of the semiconductor layer; forming an insulating layer on the semiconductor layer; forming an opening in a portion of the insulating layer corresponding to the location of the impurity layer; selectively forming a monocrystalline silicon layer in the opening of the insulating layer; selectively forming a non-monocrystalline silicon layer on the monocrystalline silicon layer; and forming a wiring layer on the non-monocrystalline silicon layer.
Claim 4
Independent Claim 100 words
A method of manufacturing a semiconductor device having a wiring contact portion, comprising the steps of: providing a semiconductor layer of first conductivity type; forming an impurity layer of second conductivity type in a surface area of the semiconductor layer; forming an insulating layer on the semiconductor layer; forming an opening in a portion of the insulating layer corresponding to the location of the impurity layer; selectively forming a monocrystalline silicon layer in the opening of the insulating layer; selectively forming a non-monocrystalline silicon layer on the monocrystalline silicon layer; and forming a wiring layer on the non-monocrystalline silicon layer.
Claim 5
Dependent Claim 26 words
A method according to claim 2, wherein the the step of selectively forming the non-monocrystalline silicon layer includes the step of depositing a polycrystalline silicon layer.
Claim 6
Dependent Claim 38 words
A method according to claim 3, wherein the step of depositing includes forming a facet having a depth smaller than the mean grain size of the polycrystalline silicon layer on the upper surface of the monocrystalline silicon layer.
Claim 7
Dependent Claim 22 words
A method according to claim 2, wherein the step of selectively forming the non-monocrystalline silicon layer includes growing an amorphous silicon layer.
Claim 8
Dependent Claim 30 words
A method according to claim 2, wherein the step of selectively forming the monocrystalline silicon layer includes contolling the thickness of monocrystalline silicon layer to less than about 0.6 micron.
Claim 9
Dependent Claim 25 words
A method according to claim 2, further comprising introducing an impurity of second conductivity type into the monocrystalline silicon layer and the non-monocrystalline silicon layer.
Claim 10
Dependent Claim 45 words
A method according to claim 2, wherein the steps of selectively forming the monocrystalline silicon layer and the non-monocrystalline silicon layer include confining the device in an apparatus having controlled growth conditions, and modifying the growth conditions after the monocrystalline silicon layer has been formed.
Claim 11
Dependent Claim 23 words
A method according to claim 2, wherein the step of forming the monocrystalline silicon layer includes selectively epitaxially growing the monocrystalline silicon layer.

References Cited (Backward Citations)

US4965219A Cited
US4592792A Cited
US4749441A Cited
US4786615A Cited
US5010034A Cited
US4963506A Cited
US5045494A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-06-23 1995-12-23 1996-06-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-06-23 1999-12-23 2000-06-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-06-23 2003-12-23 2004-06-23 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag