US5872038A
Expired / Lapsed
US
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Semiconductor device having an elevated active region formed in an oxide trench and method of manufacture thereof
Assignee: Lone Star Silicon Innovations LLC
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Filing: 1997-01-08
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Granted: 1999-02-16
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Expires: 2017-01-08
Abstract
Abstract A process for forming a semiconductor device having an elevated active region is disclosed. The process includes forming a plurality of gate electrodes on the semiconductor substrate and disposing a thick oxide layer over the gate electrodes. A trench is formed in a thick oxide layer and is filled with a polysilicon material. The polysilicon material is subsequently doped in order to form an elevated active region above an active region of the substrate.
Inventors
- 👤 Michael Duane
- 👤 Daniel Kadosh
- 👤 Mark I. Gardner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 10:22
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0223; H10D30/60; H10D30/601; H10D30/67; H10D30/6729; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10D30/0212; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
89 words
A process of forming a semiconductor device, the process comprising: forming a plurality of gate electrodes on a substrate, an active region of the substrate being defined by adjacent walls of two gate electrodes; forming an insulating layer over the gate electrodes and the active region; etching a trench in the insulating layer to expose a portion of the active region of the substrate; filling the trench with a polysilicon material; and doping the polysilicon material to form an elevated active region above the active region of the substrate.
Claim 2
Dependent Claim
89 words
A process of forming a semiconductor device, the process comprising: forming a plurality of gate electrodes on a substrate, an active region of the substrate being defined by adjacent walls of two gate electrodes; forming an insulating layer over the gate electrodes and the active region; etching a trench in the insulating layer to expose a portion of the active region of the substrate; filling the trench with a polysilicon material; and doping the polysilicon material to form an elevated active region above the active region of the substrate.
Claim 3
Dependent Claim
15 words
A process as recited in claim 1, wherein the insulating layer comprises an oxide layer.
Claim 4
Dependent Claim
31 words
A process as recited in claim 1, further comprising implanting a dopant into the active region of the substrate through the trench prior to filling the trench with the polysilicon material.
Claim 5
Dependent Claim
33 words
A process as recited in claim 1, wherein the doping of the polysilicon material includes diffusing the dopant through the polysilicon material to dope a region in the active region of the substrate.
Claim 6
Dependent Claim
21 words
A process as recited in claim 1, further comprising planarizing the polysilicon material prior to the doping of the polysilicon material.
Claim 7
Dependent Claim
51 words
A process as recited in claim 1, further comprising: forming a nitride layer on the gate electrodes prior to forming the insulating layer; and chemical mechanical polishing the resultant structure, prior to the doping of the polysilicon material, to planarize the polysilicon material using the nitride layer as a stop layer.
Claim 8
Dependent Claim
36 words
A process as recited in claim 6, further comprising: removing the nitride layer on the gate electrodes; forming a silicide on a surface of the gate electrodes and on a surface of the elevated active region.
Claim 9
Dependent Claim
61 words
A process as recited in claim 1, further comprising: implanting a first dopant into the active region of the substrate prior to forming the insulating layer to form an LDD region in the active region of the substrate; and implanting a second dopant using the trench as a pattern to form a source/drain region in the active region of the substrate.
Claim 10
Dependent Claim
21 words
A process as recited in claim 1, further comprising forming a silicide layer on a surface of the elevated active region.
Claim 11
Dependent Claim
149 words
A process of forming a metal-oxide-semiconductor (MOS) device having an elevated source/drain region, the process comprising: forming a gate oxide layer on a surface of a substrate; forming a plurality of gate electrodes on a surface of the gate oxide layer to form a resultant structure, adjacent sides of two gate electrodes defining an active region of the substrate for the formation of a source/drain region in the substrate; forming an oxide layer over the resultant structure; forming a trench in the oxide layer between the adjacent sides of the two gate electrodes to expose the surface of the substrate over a portion of the active region; filling the trench with a polysilicon material; implanting a dopant into the polysilicon material to form the elevated source/drain region and the source/drain in the active region of the substrate; forming a silicide layer over a surface of the elevated source/drain region.
Claim 12
Dependent Claim
149 words
A process of forming a metal-oxide-semiconductor (MOS) device having an elevated source/drain region, the process comprising: forming a gate oxide layer on a surface of a substrate; forming a plurality of gate electrodes on a surface of the gate oxide layer to form a resultant structure, adjacent sides of two gate electrodes defining an active region of the substrate for the formation of a source/drain region in the substrate; forming an oxide layer over the resultant structure; forming a trench in the oxide layer between the adjacent sides of the two gate electrodes to expose the surface of the substrate over a portion of the active region; filling the trench with a polysilicon material; implanting a dopant into the polysilicon material to form the elevated source/drain region and the source/drain in the active region of the substrate; forming a silicide layer over a surface of the elevated source/drain region.
Claim 13
Dependent Claim
33 words
A process as recited in claim 10, further comprising forming an LDD region in the active region of the substrate using the gate electrodes as a mask prior to forming the oxide layer.
Claim 14
Dependent Claim
23 words
A process as recited in claim 1, wherein the insulating layer has a thickness of about twice a thickness of the gate electrodes.
Claim 15
Dependent Claim
22 words
A process as recited in claim 1, wherein the insulating layer has a thickness greater than a thickness of the gate electrodes.
Claim 16
Dependent Claim
32 words
A process as recited in claim 1, wherein etching the trench in the insulating layer leaves portions of the insulating layer between edges of the trench and sidewalls of the gate electrodes.
Claim 17
Dependent Claim
32 words
A process as recited in claim 10, wherein forming the trench in the oxide layer leaves portions of the oxide layer between edges of the trench and sidewalls of the gate electrodes.
Claim 18
Dependent Claim
22 words
A process as recited in claim 10, wherein the oxide layer has a thickness greater than a thickness of the gate electrodes.
Claim 19
Dependent Claim
118 words
A process of forming a semiconductor device, comprising: forming a plurality of gate electrodes on a substrate, an active region of the substrate being defined by adjacent walls of two gate electrodes; forming an insulating layer having a thickness greater than a thickness of the gate electrodes over the gate electrodes and the active region; removing portions of the insulating layer to form a trench over a portion of the active region of the substrate and leaving portions of the insulating layer between edges of the trench and sidewalls of the gate electrodes; filling the trench with a polysilicon material; and doping the polysilicon material to form an elevated active region above the active region of the substrate.
Claim 20
Dependent Claim
118 words
A process of forming a semiconductor device, comprising: forming a plurality of gate electrodes on a substrate, an active region of the substrate being defined by adjacent walls of two gate electrodes; forming an insulating layer having a thickness greater than a thickness of the gate electrodes over the gate electrodes and the active region; removing portions of the insulating layer to form a trench over a portion of the active region of the substrate and leaving portions of the insulating layer between edges of the trench and sidewalls of the gate electrodes; filling the trench with a polysilicon material; and doping the polysilicon material to form an elevated active region above the active region of the substrate.
Claim 21
Dependent Claim
31 words
A process as recited in claim 17, further comprising implanting a dopant into the active region of the substrate through the trench prior to filling the trench with the polysilicon material.
Claim 22
Dependent Claim
32 words
A process as recited in claim 17, wherein doping of the polysilicon material includes diffusing the dopant through the polysilicon material to dope a region in the active region of the substrate.
Claim 23
Dependent Claim
23 words
A process as recited in claim 17, wherein the thickness of the insulating layer is about twice the thickness of the gate electrodes.
References Cited (Backward Citations)
US5198378A
Cited
US5124276A
Cited
US5270234A
Cited
US5371026A
Cited
US5376578A
Cited
US5597746A
Cited
US5677573A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-15 | 2002-08-17 | 2003-02-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-15 | 2006-08-17 | 2007-02-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-15 | 2010-08-17 | 2011-02-16 | $7700.00 | Window Closed / Lapsed |