Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
160 words
A method of forming a semiconductor device, comprising the steps of: providing a substrate in a processing chamber, the substrate having an insulating layer and an opening in the insulating layer; forming a copper barrier layer on the insulating layer and in the opening, the forming step comprising the substeps of: providing a plurality of refractory metal atoms and a plurality of silicon atoms in the processing chamber; ionizing the plurality of refractory metal atoms and the plurality of silicon atoms by applying a first bias to the plurality of refractory metal atoms and the plurality of silicon atoms to form a plasma; biasing the substrate at a first stage bias followed by a second stage bias to accelerate the plasma to the substrate to form the copper barrier layer, wherein the first stage bias is less than the second stage bias; and depositing a copper-containing metal on the copper barrier layer over the insulating layer and in the opening.
Claim 2
Independent Claim
160 words
A method of forming a semiconductor device, comprising the steps of: providing a substrate in a processing chamber, the substrate having an insulating layer and an opening in the insulating layer; forming a copper barrier layer on the insulating layer and in the opening, the forming step comprising the substeps of: providing a plurality of refractory metal atoms and a plurality of silicon atoms in the processing chamber; ionizing the plurality of refractory metal atoms and the plurality of silicon atoms by applying a first bias to the plurality of refractory metal atoms and the plurality of silicon atoms to form a plasma; biasing the substrate at a first stage bias followed by a second stage bias to accelerate the plasma to the substrate to form the copper barrier layer, wherein the first stage bias is less than the second stage bias; and depositing a copper-containing metal on the copper barrier layer over the insulating layer and in the opening.
Claim 3
Dependent Claim
11 words
The method of claim 1, wherein the opening is a via.
Claim 4
Dependent Claim
11 words
The method of claim 1, wherein the opening is a trench.
Claim 5
Dependent Claim
17 words
The method of claim 1, wherein the opening is a combination of a trench overlying a via.
Claim 6
Dependent Claim
14 words
The method of claim 1, wherein the insulating layer is a low K dielectric.
Claim 7
Dependent Claim
17 words
The method of claim 1, wherein the first stage bias is at or near a zero bias.
Claim 8
Dependent Claim
13 words
The method of claim 1, wherein the copper barrier layer is nitrogen-containing tantalum.
Claim 9
Dependent Claim
19 words
The method of claim 1, wherein the copper barrier layer is a refractory metal combined with silicon and nitrogen.
Claim 10
Dependent Claim
24 words
The method of claim 8, wherein the refractory metal is a material selected from the group consisting of tantalum, titanium, vanadium, molybdenum and tungsten.
Claim 11
Dependent Claim
23 words
The method of claim 1, further comprising the step of polishing the copper-containing metal to remove a predetermined amount of the copper-containing metal.
Claim 12
Dependent Claim
12 words
The method of claim 1, wherein the substrate is a metal-containing layer.
Claim 13
Dependent Claim
55 words
The method of claim 1, wherein the step of applying the first bias further comprises the steps of: providing a target in the processing chamber; and coupling a radio frequency power to the plurality of refractory metal atoms and the plurality of silicon atoms located between the substrate and the target in the processing chamber.
Claim 14
Independent Claim
254 words
A method of forming a semiconductor device comprising the steps of: providing a substrate in a processing chamber; forming an active device on the substrate, the active device having a gate region on the substrate, the gate region being between a source region in the substrate and a drain region in the substrate; forming a first insulating layer over the active device; forming a first opening in the first insulating layer, the first opening having a metal-containing material; forming a first metal layer over the first insulating layer; depositing a second insulating layer over the first metal layer; forming a second opening in the second insulating layer; forming a copper barrier layer on the second insulating layer and in the second opening, the forming step comprising the substeps of: providing a plurality of refractory metal atoms and a plurality of silicon atoms in the processing chamber; ionizing the plurality of refractory metal atoms and the plurality of silicon atoms by applying a first bias to the plurality of refractory metal atoms and the plurality of silicon atoms to form a plasma; and biasing the substrate at a first stage bias followed by a second stage bias to accelerate the plasma to the substrate to form the copper barrier layer, wherein the first stage bias is less than the second stage bias; depositing a copper-containing metal on the copper barrier layer over the second insulating layer and in the second opening; and polishing the copper-containing metal to remove a predetermined amount of the copper-containing metal.
Claim 15
Independent Claim
254 words
A method of forming a semiconductor device comprising the steps of: providing a substrate in a processing chamber; forming an active device on the substrate, the active device having a gate region on the substrate, the gate region being between a source region in the substrate and a drain region in the substrate; forming a first insulating layer over the active device; forming a first opening in the first insulating layer, the first opening having a metal-containing material; forming a first metal layer over the first insulating layer; depositing a second insulating layer over the first metal layer; forming a second opening in the second insulating layer; forming a copper barrier layer on the second insulating layer and in the second opening, the forming step comprising the substeps of: providing a plurality of refractory metal atoms and a plurality of silicon atoms in the processing chamber; ionizing the plurality of refractory metal atoms and the plurality of silicon atoms by applying a first bias to the plurality of refractory metal atoms and the plurality of silicon atoms to form a plasma; and biasing the substrate at a first stage bias followed by a second stage bias to accelerate the plasma to the substrate to form the copper barrier layer, wherein the first stage bias is less than the second stage bias; depositing a copper-containing metal on the copper barrier layer over the second insulating layer and in the second opening; and polishing the copper-containing metal to remove a predetermined amount of the copper-containing metal.
Claim 16
Dependent Claim
15 words
The method of claim 13, wherein the second insulating layer is a low K dielectric.
Claim 17
Dependent Claim
19 words
The method of claim 13, wherein the copper barrier layer is a refractory metal combined with silicon and nitrogen.
Claim 18
Dependent Claim
24 words
The method of claim 15, wherein the refractory metal is a material selected from the group consisting of tantalum, titanium, vanadium, molybdenum and tungsten.
Claim 19
Dependent Claim
13 words
The method of claim 13, wherein the copper barrier layer is nitrogen-containing tantalum.
Claim 20
Dependent Claim
12 words
The method of claim 13, wherein the second opening is a via.
Claim 21
Dependent Claim
12 words
The method of claim 13, wherein the second opening is a trench.
Claim 22
Dependent Claim
17 words
The method of claim 13, wherein the opening is a combination of a trench overlying a via.
Claim 23
Dependent Claim
17 words
The method of claim 13, wherein the first stage bias is at or near a zero bias.
Claim 24
Dependent Claim
77 words
A semiconductor device, comprising: a substrate; an insulating layer on the substrate, the insulating layer having an opening, the opening having an opening bottom and opening sidewalls; a copper barrier layer on the insulating layer and in the opening, the copper barrier layer having a sidewall silicon concentration and a bottom silicon concentration, wherein the bottom silicon concentration is less than the sidewall silicon concentration; and a copper-containing layer over the insulating layer and in the opening.
Claim 25
Dependent Claim
77 words
A semiconductor device, comprising: a substrate; an insulating layer on the substrate, the insulating layer having an opening, the opening having an opening bottom and opening sidewalls; a copper barrier layer on the insulating layer and in the opening, the copper barrier layer having a sidewall silicon concentration and a bottom silicon concentration, wherein the bottom silicon concentration is less than the sidewall silicon concentration; and a copper-containing layer over the insulating layer and in the opening.
Claim 26
Dependent Claim
15 words
The semiconductor device of claim 22, wherein the insulating layer is a low K dielectric.
Claim 27
Dependent Claim
18 words
The semiconductor device of claim 22, wherein the opening is a combination of a trench overlying a via.
Claim 28
Dependent Claim
20 words
The semiconductor device of claim 22, wherein the copper barrier layer is a refractory metal combined with nitrogen and silicon.
Claim 29
Dependent Claim
25 words
The semiconductor device of claim 25, wherein the refractory metal is a material selected from the group consisting of tantalum, titanium, vanadium, molybdenum and tungsten.
Claim 30
Dependent Claim
14 words
The semiconductor device of claim 22, wherein the copper barrier layer is nitrogen-containing tantalum.
Claim 31
Dependent Claim
12 words
The semiconductor device of claim 22, wherein the opening is a via.
Claim 32
Dependent Claim
12 words
The semiconductor device of claim 22, wherein the opening is a trench.
Claim 33
Dependent Claim
16 words
The semiconductor device of claim 22, wherein the bottom silicon concentration is less than 5% silicon.
Claim 34
Dependent Claim
21 words
The semiconductor device of claim 22, wherein the sidewall silicon concentration is in a range of about 10 to 20% silicon.