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US6093629A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of simplified contact etching and ion implantation for CMOS technology

Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1998-02-02
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Granted: 2000-07-25
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Expires: 2018-02-02
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Abstract

Abstract A method for forming n- and p-type contacts for CMOS integrated circuits is described wherein the contact openings are ion implanted after being etched to provide supplemental doping to the exposed device elements in order to secure a reliable low resistance interface with subsequently deposited contact metallurgy The p-type contact openings and the n-type contact openings are patterned, etched, and ion implanted separately, thereby requiring only two photolithographic steps. By etching and implanting the p-contacts and n-contacts separately, the method eliminates one highly complex and contaminative photolithographic step and introduces a less complex etch step with reduced contamination risk, thereby achieving a cost saving by improving yield and reducing process time. It is optional which contacts are processed first.

Inventors

  • 👤 Sen-Fu Chen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 05:44
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 148 words
A method for forming contacts to semiconductive elements on a silicon wafer comprising: (a) providing a silicon wafer having n- and p-type semiconductive elements; (b) depositing an insulative layer over said semiconductive elements; (c) depositing a first photoresist layer on said insulative layer; (d) patterning said first photoresist layer to define p-type contacts to said p-type semiconductive elements; (e) etching said insulative layer thereby forming p-contact openings; (f) implanting p-type impurity into said p-contact openings; (g) stripping said first photoresist layer; (h) depositing a second photoresist layer on said insulative layer; (i) patterning said second photoresist layer to define n-type contacts to said n-type semiconductive elements while covering said p-contact openings; (j) etching said insulative layer thereby forming n-contact openings; (k) implanting n-type impurity ions into said n-contact openings; (l) stripping said second photoresist layer; and (m) forming conductive plugs in said n-contact openings and said p-contact openings.
Claim 2
Independent Claim 148 words
A method for forming contacts to semiconductive elements on a silicon wafer comprising: (a) providing a silicon wafer having n- and p-type semiconductive elements; (b) depositing an insulative layer over said semiconductive elements; (c) depositing a first photoresist layer on said insulative layer; (d) patterning said first photoresist layer to define p-type contacts to said p-type semiconductive elements; (e) etching said insulative layer thereby forming p-contact openings; (f) implanting p-type impurity into said p-contact openings; (g) stripping said first photoresist layer; (h) depositing a second photoresist layer on said insulative layer; (i) patterning said second photoresist layer to define n-type contacts to said n-type semiconductive elements while covering said p-contact openings; (j) etching said insulative layer thereby forming n-contact openings; (k) implanting n-type impurity ions into said n-contact openings; (l) stripping said second photoresist layer; and (m) forming conductive plugs in said n-contact openings and said p-contact openings.
Claim 3
Dependent Claim 13 words
The method of claim 1 wherein said insulative layer is a borophosphosilicate glass.
Claim 4
Dependent Claim 42 words
The method of claim 1 wherein said p-type impurity ions are BF 2 + ions and are implanted at a dose of between about 2×10 14 and 2×10 15 ions/cm 2 and at an energy of between about 30 and 100 keV.
Claim 5
Dependent Claim 40 words
The method of claim 1 wherein said n-type impurity ions are phosphorous ions and are implanted at a dose of between about 2×10 14 and 2×10 15 ions/cm 2 and at an energy of between about 30 and 100 keV.
Claim 6
Dependent Claim 12 words
method of claim 1 wherein said conductive plugs contacts are tungsten plugs.
Claim 7
Independent Claim 157 words
A method for forming contacts in a CMOS integrated circuit comprising: (a) providing a silicon wafer having CMOS devices comprising p-channel MOSFETs and n-channel MOSFETS; (b) depositing an insulative layer over said CMOS devices; (c) planarizing said insulative layer; (d) depositing a first photoresist layer on said insulative layer; (e) patterning said first photoresist layer to define p-type contacts to elements of said p-channel MOSFETs; (f) etching said insulative layer thereby forming n-contact openings; (g) implanting p-type impurity ions into said p-contact openings; (h) stripping said first photoresist layer; (i) depositing a second photoresist layer on said insulative layer; (j) patterning said second photoresist layer to define n-type contacts to elements of said n-channel MOSFETs while covering said p-contact openings; (k) etching said insulative layer thereby forming n-contact openings; (l) implanting n-type impurity ions into said n-contact openings; (m) stripping said second photoresist layer; said (n) forming conductive plugs in said n-contact openings and said p-contact openings.
Claim 8
Independent Claim 157 words
A method for forming contacts in a CMOS integrated circuit comprising: (a) providing a silicon wafer having CMOS devices comprising p-channel MOSFETs and n-channel MOSFETS; (b) depositing an insulative layer over said CMOS devices; (c) planarizing said insulative layer; (d) depositing a first photoresist layer on said insulative layer; (e) patterning said first photoresist layer to define p-type contacts to elements of said p-channel MOSFETs; (f) etching said insulative layer thereby forming n-contact openings; (g) implanting p-type impurity ions into said p-contact openings; (h) stripping said first photoresist layer; (i) depositing a second photoresist layer on said insulative layer; (j) patterning said second photoresist layer to define n-type contacts to elements of said n-channel MOSFETs while covering said p-contact openings; (k) etching said insulative layer thereby forming n-contact openings; (l) implanting n-type impurity ions into said n-contact openings; (m) stripping said second photoresist layer; said (n) forming conductive plugs in said n-contact openings and said p-contact openings.
Claim 9
Dependent Claim 13 words
The method of claim 6 wherein said insulative layer is a borophosphosilicate glass.
Claim 10
Dependent Claim 42 words
The method of claim 6 wherein said p-type impurity ions are BF 2 + ions and are implanted at a dose of between about 2×10 14 and 2×10 15 ions/cm 2 and at an energy of between about 30 and 100 keV.
Claim 11
Dependent Claim 40 words
The method of claim 6 wherein said n-type impurity ions are phosphorous ions and are implanted at a dose of between about 2×10 14 and 2×10 15 ions/cm 2 and at an energy of between about 30 and 100 keV.
Claim 12
Dependent Claim 11 words
method of claim 6 wherein said conductive plugs are tungsten plugs.
Claim 13
Independent Claim 157 words
A method for forming contacts in a CMOS integrated circuit comprising: (a) providing a silicon wafer having CMOS devices comprising p-channel MOSFETs and n-channel MOSFETS; (b) depositing an insulative layer over said CMOS devices; (c) planarizing said insulative layer; (d) depositing a first photoresist layer on said insulative layer; (e) patterning said first photoresist layer to define n-type contacts to elements of said n-channel MOSFETs; (f) etching said Insulative layer thereby forming n-contact openings; (g) implanting n-type impurity ions into said n-contact openings; (h) stripping said first photoresist layer; (i) depositing a second photoresist layer on said insulative layer; (j) patterning said second photoresist layer to define p-type contacts to elements of said n-channel MOSFETs while covering said p-contact openings; (k) etching said insulative layer thereby forming p-contact openings; (l) implanting p-type impurity ions into said p-contact openings; (m) stripping said second photoresist layer; and (n) forming conductive plugs in said n-contact openings and said p-contact openings.
Claim 14
Independent Claim 157 words
A method for forming contacts in a CMOS integrated circuit comprising: (a) providing a silicon wafer having CMOS devices comprising p-channel MOSFETs and n-channel MOSFETS; (b) depositing an insulative layer over said CMOS devices; (c) planarizing said insulative layer; (d) depositing a first photoresist layer on said insulative layer; (e) patterning said first photoresist layer to define n-type contacts to elements of said n-channel MOSFETs; (f) etching said Insulative layer thereby forming n-contact openings; (g) implanting n-type impurity ions into said n-contact openings; (h) stripping said first photoresist layer; (i) depositing a second photoresist layer on said insulative layer; (j) patterning said second photoresist layer to define p-type contacts to elements of said n-channel MOSFETs while covering said p-contact openings; (k) etching said insulative layer thereby forming p-contact openings; (l) implanting p-type impurity ions into said p-contact openings; (m) stripping said second photoresist layer; and (n) forming conductive plugs in said n-contact openings and said p-contact openings.
Claim 15
Dependent Claim 13 words
The method of claim 11 wherein said insulative layer is a borophosphosilicate glass.
Claim 16
Dependent Claim 42 words
The method of claim 11 wherein said p-type impurity ions are BF 2 + ions and are implanted at a dose of between about 2×10 14 and 2×10 15 ions/cm 2 and at an energy of between about 30 and 100 keV.
Claim 17
Dependent Claim 40 words
The method of claim 11 wherein said n-type impurity ions are phosphorous ions and are implanted at a dose of between about 2×10 14 and 2×10 15 ions/cm 2 and at an energy of between about 30 and 100 keV.
Claim 18
Dependent Claim 11 words
method of claim 11 wherein said conductive plugs are tungsten plugs.

References Cited (Backward Citations)

US4512073A Cited
US5154946A Cited
US5292677A Cited
US5573969A Cited
US5460993A Cited
US5705442A Cited
US5718800A Cited
US5700717A Cited
US5554565A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-07-25 2004-01-24 2004-07-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-07-25 2008-01-24 2008-07-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-07-25 2012-01-24 2012-07-25 $7700.00 Window Closed / Lapsed

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