Patent US6087203A successfully refreshed from Google Patents.
US6087203A
Expired / Lapsed
US
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Method for adhering and sealing a silicon chip in an integrated circuit package
Assignee: Texas Instruments Inc
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Filing: 1997-12-19
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Granted: 2000-07-11
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Expires: 2017-12-19
Abstract
Abstract A method and apparatus for producing an integrated circuit package (30) comprising a substrate (70) having an opening (86) and first and second surfaces (92, 94), a plurality of routing strips (82) being integral with the substrate (70) and extending into the opening (86), a plurality of pads (100) disposed on the first and second surfaces (92, 94) are electrically connected with at least one of the routing strips (82), wire bonding (80) electrically connecting at least one bonding pad (120) to at least one of the routing strips (82) and a silicon chip (50) attached to the printed circuit board (70) by an adhesive material (60) that provide a seal between silicon chip (50) and printed circuit board (70) is disclosed.
Inventors
- 👤 Kian Teng Eng
- 👤 Min Yu Chan
- 👤 Jing Sua Goh
- 👤 Siu Waf Low
- 👤 Boon Pew Chan
- 👤 Tuck Fook Toh
- 👤 Chee Kiang Yew
- 👤 Pak Hong Yee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 14:14
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W72/00; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W70/685; H10W72/071; H10W72/073; H10W72/07331; H10W72/07337; H10W72/075; H10W72/07551; H10W72/07554; H10W72/20; H10W72/29; H10W72/30; H10W72/351; H10W72/352; H10W72/353; H10W72/354; H10W72/50; H10W72/541; H10W72/5449; H10W72/547; H10W72/551; H10W72/552; H10W72/5522; H10W72/59; H10W72/851; H10W72/853; H10W72/865; H10W72/90; H10W72/931; H10W72/932; H10W72/941; H10W72/944; H10W72/9445; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
113 words
A method for protecting a semiconductor chip attached to a substrate comprising the steps of: attaching an adhesive layer to the substrate; positioning the chip in contact with said adhesive layer; placing the chip on a mounting stage while in contact with said adhesive layer; applying heat and force to the chip while the chip is in contact with the adhesive layer sufficient to cause said adhesive layer to flow into areas between said chip and said substrate and around the perimeter of the chip; and adhering the chip to the substrate and providing a seal around the perimeter of the chip to protect the chip by removal of said heat and force.
Claim 2
Independent Claim
113 words
A method for protecting a semiconductor chip attached to a substrate comprising the steps of: attaching an adhesive layer to the substrate; positioning the chip in contact with said adhesive layer; placing the chip on a mounting stage while in contact with said adhesive layer; applying heat and force to the chip while the chip is in contact with the adhesive layer sufficient to cause said adhesive layer to flow into areas between said chip and said substrate and around the perimeter of the chip; and adhering the chip to the substrate and providing a seal around the perimeter of the chip to protect the chip by removal of said heat and force.
Claim 3
Dependent Claim
24 words
The method as recited in claim 1 wherein the step of attaching an adhesive layer to the substrate is applied by said mounting stage.
Claim 4
Dependent Claim
32 words
The method as recited in claim 1 wherein the step of applying heat to the chip further include applying heat at a temperature between about 200 degrees C and 250 degrees C.
Claim 5
Dependent Claim
28 words
The method as recited in claim 1 wherein the step of applying heat to the chip further include applying heat at a temperature of about 220 degrees C.
Claim 6
Dependent Claim
26 words
The method as recited in claim 3 wherein the step of applying a force to the chip further includes applying between about 150 and 200 grams.
Claim 7
Dependent Claim
24 words
The method as recited in claim 4 wherein the step of applying a force to the chip further includes applying of about 175 grams.
Claim 8
Dependent Claim
29 words
The method as recited in claim 5 wherein the step of applying a force to the chip further includes applying said force for between about 2 and 10 seconds.
Claim 9
Dependent Claim
26 words
The method as recited in claim 6 wherein the step of applying a force to the chip further includes applying said force for about 5 seconds.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-07-11 | 2004-01-10 | 2004-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-07-11 | 2008-01-10 | 2008-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-07-11 | 2012-01-10 | 2012-07-11 | $7700.00 | Window Closed / Lapsed |