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US6063675A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of forming a MOSFET using a disposable gate with a sidewall dielectric

Assignee: Texas Instruments Inc
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Filing: 1997-10-24
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Granted: 2000-05-16
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Expires: 2017-10-24
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Abstract

Abstract A method for forming a MOSFET (200) using a disposable gate. A disposable gate (220) having at least two materials that may be etched selectively with respect to each other is formed on a substrate (202). A sidewall dielectric (215) is formed on the sidewalls of the disposable gate (220). The composition of the disposable gate materials (222,223, and 224) and the sidewall dielectric (215) are chosen such that the disposable gate (220) may be removed selectively with respect to the sidewall dielectric (215). A dielectric layer (214) is then deposited over the structure and a portion of the dielectric layer (214) is removed to expose the disposable gate (220) (e.g., using CMP or an etch-back). The composition of the dielectric layer (214) is chosen such that (1) the dielectric layer (214) may be removed selectively with respect to the sidewall dielectric (215) and (2) a layer of the disposable gate (220) may be removed selectively with respect to the dielectric layer (214). The disposable gate (220) is then removed and the gate dielectric (210) and gate electrode (212) are formed.

Inventors

  • 👤 Mark S. Rodder

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 19:28
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/027; H10D30/0273; H10D30/0275; H10D64/00; H10D64/01; H10D64/017; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; Y; Y10; Y10S; Y10S438/00; Y10S438/926

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 105 words
A method of forming a transistor comprising the steps of: forming a disposable gate over a defined channel region of a substrate; forming a sidewall dielectric adjacent said disposable gate; forming a source/drain region adjacent said sidewall dielectric; forming a dielectric layer over said source/drain region, said dielectric layer comprising a material that may be removed selectively with respect to said sidewall dielectric; selectively removing said disposable gate without substantially removing said sidewall dielectric; selectively removing said sidewall dielectric; forming a gate dielectric over said defined channel region, after said step of selectively removing said sidewall dielectric; forming a gate electrode over said gate dielectric.
Claim 2
Independent Claim 105 words
A method of forming a transistor comprising the steps of: forming a disposable gate over a defined channel region of a substrate; forming a sidewall dielectric adjacent said disposable gate; forming a source/drain region adjacent said sidewall dielectric; forming a dielectric layer over said source/drain region, said dielectric layer comprising a material that may be removed selectively with respect to said sidewall dielectric; selectively removing said disposable gate without substantially removing said sidewall dielectric; selectively removing said sidewall dielectric; forming a gate dielectric over said defined channel region, after said step of selectively removing said sidewall dielectric; forming a gate electrode over said gate dielectric.
Claim 3
Dependent Claim 33 words
The method of claim 1, wherein said step of forming a source/drain region comprises the steps of: forming a raised source/drain region; and diffusing dopant from said raised source/drain region into said substrate.
Claim 4
Dependent Claim 20 words
The method of claim 1, wherein said disposable gate comprises a first material layer and a distinct second material layer.
Claim 5
Dependent Claim 20 words
The method of claim 3, wherein said first material layer comprises oxide and said second material layer comprises silicon germanium.
Claim 6
Dependent Claim 19 words
The method of claim 3, wherein said first material layer comprises oxide and said second material layer comprises silicon.
Claim 7
Dependent Claim 20 words
The method of claim 3, wherein said disposable gate further comprises a third material layer above said second material layer.
Claim 8
Dependent Claim 40 words
The method of claim 6, wherein said first material layer comprises a dielectric, said second material layer comprises a semiconductor, said third material layer comprises a dielectric, said sidewall dielectric comprises a nitride, and said dielectric layer comprises an oxide.
Claim 9
Dependent Claim 10 words
The method of claim 7, wherein said semiconductor is silicon.
Claim 10
Dependent Claim 11 words
The method of claim 7, wherein said semiconductor is silicon germanium.
Claim 11
Dependent Claim 12 words
The method of claim 7, wherein said first material layer comprises oxide.
Claim 12
Dependent Claim 12 words
The method of claim 7, wherein said third material layer comprises nitride.
Claim 13
Dependent Claim 12 words
The method of claim 7, wherein said third material layer comprises oxide.

References Cited (Backward Citations)

US4359816A Cited
US5168072A Cited
US5716861A Cited
JPH06232152A Cited
US5576227A Cited
US5866459A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-05-16 2003-11-15 2004-05-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-05-16 2007-11-15 2008-05-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-05-16 2011-11-15 2012-05-16 $7700.00 Window Closed / Lapsed

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