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US6031391A Expired / Lapsed US ⏱️ 0.0 years remaining

Configuration memory integrated circuit

Assignee: Altera Corp
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Filing: 1999-06-14
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Granted: 2000-02-29
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Expires: 2019-06-14
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Abstract

Abstract A configuration memory for storing information which is in-system programmable. The programming of the configuration memory may be performed using JTAG (IEEE Standard 1149.1) instructions. Furthermore, the configuration of a programmable logic device using the configuration data in the configuration memory may be initiated with a JTAG instruction. Pull-up resistors are incorporated within the configuration memory package.

Inventors

  • 👤 Chris Couts-Martin
  • 👤 Alan Herrmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 15:38
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G11; G11C; G11C29/00; G11C29/04; G11C29/08; G11C29/48; H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17704; H03K19/17748; H03K19/1776

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 88 words
A digital system comprising: a configuration memory, said configuration memory having a memory array for storing information, a data out port for transferring said information, and JTAG circuitry capable of receiving one of a group of JTAG instructions from a JTAG port and controlling operation of said configuration memory according to said JTAG instruction; and a programmable logic device, said programmable logic device being coupled to said data out port of said configuration memory, whereby said information is transferrable from said configuration memory to said programmable logic device.
Claim 2
Dependent Claim 88 words
A digital system comprising: a configuration memory, said configuration memory having a memory array for storing information, a data out port for transferring said information, and JTAG circuitry capable of receiving one of a group of JTAG instructions from a JTAG port and controlling operation of said configuration memory according to said JTAG instruction; and a programmable logic device, said programmable logic device being coupled to said data out port of said configuration memory, whereby said information is transferrable from said configuration memory to said programmable logic device.
Claim 3
Dependent Claim 16 words
The digital system of claim 1 wherein said configuration memory is programmable via said JTAG port.
Claim 4
Dependent Claim 13 words
The digital system of claim 1 wherein said memory array is in-system programmable.
Claim 5
Dependent Claim 17 words
The digital system of claim 1 wherein said information is configuration data for configuring programmable logic devices.
Claim 6
Dependent Claim 18 words
The digital system of claim 1 wherein said information is transferrable responsive to receipt of said JTAG instruction.
Claim 7
Dependent Claim 37 words
The digital system of claim 1 wherein said configuration memory further comprises: an output terminal, said output terminal being changed from a first logic state to a second logic state responsive to receipt of said JTAG instruction.
Claim 8
Independent Claim 81 words
A method of configuring a programmable logic device comprising the steps of: providing a first configuration memory having a memory array and JTAG circuitry capable of receiving one of a group of JTAG instructions from a JTAG port and controlling operation of said configuration memory according to said JTAG instruction; programming said memory array of said first configuration memory with configuration data; and transferring said configuration data from said memory array of said first configuration memory to said programmable logic device.
Claim 9
Independent Claim 81 words
A method of configuring a programmable logic device comprising the steps of: providing a first configuration memory having a memory array and JTAG circuitry capable of receiving one of a group of JTAG instructions from a JTAG port and controlling operation of said configuration memory according to said JTAG instruction; programming said memory array of said first configuration memory with configuration data; and transferring said configuration data from said memory array of said first configuration memory to said programmable logic device.
Claim 10
Dependent Claim 26 words
The method of claim 7 wherein said programming step further comprises: transferring configuration data to said memory array of said configuration memory through said JTAG port.
Claim 11
Dependent Claim 14 words
The method of claim 7 wherein said programming step is accomplished with in-system programming.
Claim 12
Dependent Claim 70 words
The method of claim 7 wherein said transferring data step further comprises the steps of: sending a JTAG instruction via said JTAG port to said configuration memory; asserting an output signal on said configuration memory responsive to said JTAG instruction; receiving said output signal at said programmable logic device; preparing said programmable logic device for receipt of said configuration data; and shifting said configuration data to said programmable logic device.
Claim 13
Dependent Claim 27 words
The method of claim 7 wherein said transferring data step is accomplished by shifting said configuration data out of said configuration memory one bit at a time.
Claim 14
Dependent Claim 53 words
The method of claim 7 further comprising the steps of: providing a second configuration memory having a memory array; programming said memory array of said second configuration memory with additional configuration data; after said configuration data is transferred to said programmable logic device, transferring said additional configuration data to said programmable logic device.
Claim 15
Dependent Claim 24 words
A digital system comprising: a configuration memory; a programmable logic device, said programmable logic device having been configured by the method of claim 7.
Claim 16
Independent Claim 87 words
A method of programming a plurality of programmable logic devices comprising the steps of: providing a configuration memory having a memory array, a data out port, a JTAG port, and JTAG circuitry capable of receiving one of a group of JTAG instructions from said JTAG port and controlling operation of said configuration memory according to said JTAG instruction; programming said memory array of said configuration memory with configuration data; and transferring said configuration data from said configuration memory to each of said plurality of programmable logic devices.
Claim 17
Independent Claim 87 words
A method of programming a plurality of programmable logic devices comprising the steps of: providing a configuration memory having a memory array, a data out port, a JTAG port, and JTAG circuitry capable of receiving one of a group of JTAG instructions from said JTAG port and controlling operation of said configuration memory according to said JTAG instruction; programming said memory array of said configuration memory with configuration data; and transferring said configuration data from said configuration memory to each of said plurality of programmable logic devices.
Claim 18
Dependent Claim 104 words
The method of claim 14 wherein said plurality of programmable logic devices are coupled together to form a sequential chain of programmable logic elements, said sequential chain having a data in port of a first programmable logic device of said plurality of programmable logic devices coupled with said configuration memory and each successive programmable logic device in said sequential chain having its data in port coupled with a data out port of a previous programmable logic device in said sequential chain, said configuration data being transferred serially from said configuration memory to each of said plurality of programmable logic devices through said sequential chain.
Claim 19
Dependent Claim 54 words
The method of claim 14 wherein said transferring step further comprises the steps of: serially transferring a first portion of said configuration data via a first path to a first programmable logic device; and thereafter serially transferring a second portion of said configuration data via a second path to a second programmable logic device.
Claim 20
Dependent Claim 52 words
The method of claim 14 wherein said transferring step further comprises the steps of: transferring a first portion of said configuration data via a first path to a first programmable logic device; and concurrently transferring a second portion of said configuration data via a second path to a second programmable logic device.
Claim 21
Dependent Claim 59 words
The method of claim 14 wherein said transferring step further comprises the steps of: serially transferring a first portion of said configuration data to a first programmable logic device through a second programmable logic device; and serially transferring a second portion of said configuration data to a second programmable logic device via a direct path from said configuration memory.
Claim 22
Dependent Claim 46 words
The method of claim 14 further comprising the steps of: providing a second configuration memory; programming said second configuration memory with additional configuration data, after said transferring configuration data step; transferring said additional configuration data to at least one of said plurality of programmable logic devices.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-02-28 2003-08-30 2004-02-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-02-28 2007-08-30 2008-02-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-02-28 2011-08-30 2012-02-29 $7700.00 Window Closed / Lapsed

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