Patent US6030855A successfully refreshed from Google Patents.
US6030855A
Expired / Lapsed
US
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Self-aligned connector for stacked chip module
Assignee: International Business Machines Corp
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Filing: 1999-02-08
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Granted: 2000-02-29
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Expires: 2019-02-08
Abstract
Abstract A semiconductor structure includes a stack of two semiconductor chips. An edge of the chips forms a side surface of the stack. Insulation and adhesive is located between the chips, and a wire contacting circuitry on one of the chips extends through the insulation to the side surface. A first conductor contacts the wire on the side surface. The first conductor is self-aligned to the wire and extends above the side surface. The first conductor facilitates pads or connectors on the side surface that are insulated from the semiconductor chips. The self-aligned first conductor is an electroplated or electroless plated metal.
Inventors
- 👤 Claude L. Bertin
- 👤 Thomas G. Ference
- 👤 Wayne J. Howell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 15:10
CPC Classifications
H; H10; H10W; H10W72/00; H10W90/00; H10W46/00; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W72/20; H10W72/251; H10W72/90; H10W72/921; H10W72/923; H10W72/941; H10W72/942; H10W72/951; H10W72/952; H10W90/20; H10W90/297; H10W90/701; H10W90/721; H10W90/722
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
66 words
A method for fabricating a semiconductor structure, comprising the steps of: a) providing a planar surface comprising a semiconductor and a first insulator; b) forming a metal lead extending no higher than said surface, said lead insulated from said semiconductor by said first insulator; and c) forming a non-integral first conductor contacting said lead and extending above said surface, said first conductor self-aligned to said lead.
Claim 2
Independent Claim
66 words
A method for fabricating a semiconductor structure, comprising the steps of: a) providing a planar surface comprising a semiconductor and a first insulator; b) forming a metal lead extending no higher than said surface, said lead insulated from said semiconductor by said first insulator; and c) forming a non-integral first conductor contacting said lead and extending above said surface, said first conductor self-aligned to said lead.
Claim 3
Dependent Claim
96 words
A method as recited in claim 1, wherein said planar surface providing step (a) comprising the step of polishing a first side surface of at least two stacked integrated circuit chips, said side surface comprising semiconductor edges of said stacked chips and said first insulator, said first insulator being a first layer of insulation extending between said chips; and said conductive lead forming step (b) comprising the steps of making electrical contact with a circuit on one of said chips and providing said conductive lead through said first layer of insulation to said first side surface.
Claim 4
Dependent Claim
15 words
A method as recited in claim 2, said forming step (c) being a plating step.
Claim 5
Dependent Claim
54 words
A method as recited in claim 2, further comprising the step of providing a second layer of insulation, said second layer of insulation being on said first side surface, said method further comprising the step of depositing a metallization layer on said second layer of insulation, said metallization layer electrically contacting said first conductor.
Claim 6
Dependent Claim
21 words
A method as recited in claim 4, wherein said metallization layer depositing step comprises the step of forming a T-connect pad.
Claim 7
Dependent Claim
18 words
A method as recited in claim 5, wherein said metallization layer depositing step comprises the step of plating.
Claim 8
Dependent Claim
21 words
A method as recited in claim 6, further comprising the step of polishing said plated metal to form said T-connect pad.
Claim 9
Dependent Claim
20 words
A method as recited in claim 4, further comprising the step of forming a terminal metal on said metallization layer.
Claim 10
Dependent Claim
18 words
A method as recited in claim 8, said terminal metal forming, step comprising the step of plating solder.
Claim 11
Dependent Claim
38 words
A method as recited in claim 2, said stacked chips further comprising a second side surface, said method further comprising the step of providing said conductive lead to said second side surface and to said first side surface.
Claim 12
Dependent Claim
44 words
A method as recited in claim 10, said method further comprising the step of providing a plurality of said conductive leads to said second side surface and to said first side surface, said plurality of conductive leads all interconnected along said second side surface.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-02-28 | 2003-08-30 | 2004-02-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-02-28 | 2007-08-30 | 2008-02-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-02-28 | 2011-08-30 | 2012-02-29 | $7700.00 | Window Closed / Lapsed |