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Patent US6008075A successfully refreshed from Google Patents.
US6008075A
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US
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Method for simultaneous formation of contacts between metal layers and fuse windows in semiconductor manufacturing
Assignee: Vanguard International Semiconductor Corp
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Filing: 1999-02-11
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Granted: 1999-12-28
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Expires: 2019-02-11
Abstract
Abstract A method for simultaneous fabrication of an interlever metal contact and a fuse window reducing the number of masking steps required while providing a high yield for the fuse. A semiconductor substrate is provided having a device area with a first metal layer over an InterLevel Dielectric layer and a fuse area with a polysilicon fuse buried within the InterLevel Dielectric layer. A thick anti-reflective coating is formed on the first metal layer. The first metal layer and the anti-reflective coating are patterned to form a first metal line. An InterMetal Dielectric layer is formed over the InterLevel Dielectric layer and the first metal line. The InterMetal Dielectric layer, the InterLevel Dielectric layer, and the anti-reflective coating are patterned, simultaneously opening a via hole extending partially into the anti-reflective coating and a fuse window opening extending into the InterLevel Dielectric layer without exposing the fuse. An adhesion layer is formed over the InterMetal Dielectric layer. A Tungsten layer is blanket deposited on the adhesion layer and anisotropically etched, forming a W-plug in the via hole and a W-ring on the sidewalls of the fuse window opening. An upper metal layer is formed on the adhesion layer, the W-plug, and the W-ring and patterned to form an upper metal line. This etch also forms an upper metal ring on the inside wall of the W-ring. A passivation layer and a dielectric layer are formed and patterned to extend the fuse window opening through the passivation layer without exposing the fuse.
Inventors
- 👤 Wah-Yih Lien
- 👤 Ing-Ruey Liaw
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 03:27
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10B; H10B12/00; H10B12/01; H10B12/09; H10W20/40; H10W20/49; H10W20/493
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
328 words
A method for simultaneous fabrication of an interlevel metal contact and a fuse window consisting of the steps of: a) providing a semiconductor substrate having an InterLevel Dielectric layer; said substrate having a device area with a first metal layer over said InterLevel Dielectric layer and a fuse area with a polysilicon fuse buried within said InterLevel Dielectric layer; b) forming an anti-reflective coating on said first metal layer; c) patterning said first metal layer and said anti-reflective coating to form a first metal line; d) forming an InterMetal Dielectric layer over said InterLevel Dielectric layer and said first metal line; e) patterning said InterMetal Dielectric layer, said InterLevel Dielectric layer, and said anti-reflective coating to simultaneously open a via hole extending partially into the anti-reflective coating and a fuse window opening extending into said InterLevel Dielectric layer without exposing said fuse; said via hole and said fuse window having sidewalls and bottoms; f) forming an adhesion layer over said InterMetal Dielectric layer, said anti-reflective coating, and said InterLevel Dielectric; g) blanket depositing a Tungsten layer on said adhesion layer; h) anisotropically etching said Tungsten layer; said etch stopping on said adhesion layer; thereby forming a W-plug in said via hole and a W-ring on said sidewalls of said fuse window opening; said W-ring having an inside wall; i) forming an upper metal layer on said adhesion layer, said W-plug, and said W-ring; j) patterning said upper metal layer using an anisotropic etch to form a upper metal line contacting said W-plug; said anisotropic etch forming an upper metal ring on said inside wall of said W-ring; whereby said upper metal ring and said W-ring form a moisture barrier guard ring; k) forming a passivation layer over said upper metal layer, said InterMetal Dielectric layer, and said InterLevel Dielectric layer; l) forming a dielectric layer on said passivation layer; and m) patterning said dielectric layer and said passivation layer; thereby extending said fuse window through said passivation layer.
Claim 2
Independent Claim
328 words
A method for simultaneous fabrication of an interlevel metal contact and a fuse window consisting of the steps of: a) providing a semiconductor substrate having an InterLevel Dielectric layer; said substrate having a device area with a first metal layer over said InterLevel Dielectric layer and a fuse area with a polysilicon fuse buried within said InterLevel Dielectric layer; b) forming an anti-reflective coating on said first metal layer; c) patterning said first metal layer and said anti-reflective coating to form a first metal line; d) forming an InterMetal Dielectric layer over said InterLevel Dielectric layer and said first metal line; e) patterning said InterMetal Dielectric layer, said InterLevel Dielectric layer, and said anti-reflective coating to simultaneously open a via hole extending partially into the anti-reflective coating and a fuse window opening extending into said InterLevel Dielectric layer without exposing said fuse; said via hole and said fuse window having sidewalls and bottoms; f) forming an adhesion layer over said InterMetal Dielectric layer, said anti-reflective coating, and said InterLevel Dielectric; g) blanket depositing a Tungsten layer on said adhesion layer; h) anisotropically etching said Tungsten layer; said etch stopping on said adhesion layer; thereby forming a W-plug in said via hole and a W-ring on said sidewalls of said fuse window opening; said W-ring having an inside wall; i) forming an upper metal layer on said adhesion layer, said W-plug, and said W-ring; j) patterning said upper metal layer using an anisotropic etch to form a upper metal line contacting said W-plug; said anisotropic etch forming an upper metal ring on said inside wall of said W-ring; whereby said upper metal ring and said W-ring form a moisture barrier guard ring; k) forming a passivation layer over said upper metal layer, said InterMetal Dielectric layer, and said InterLevel Dielectric layer; l) forming a dielectric layer on said passivation layer; and m) patterning said dielectric layer and said passivation layer; thereby extending said fuse window through said passivation layer.
Claim 3
Dependent Claim
27 words
The method of claim 1 wherein said polysilicon fuse is buried within said InterLevel Dielectric Layer at a depth of between about 1 μm and 2 μm.
Claim 4
Dependent Claim
25 words
The method of claim 1 wherein said anti-reflective coating is composed of TiN having a thickness in the range between 1000 Å and 1500 Å.
Claim 5
Dependent Claim
27 words
The method of claim 1 wherein said InterMetal Dielectric layer is composed of silicon dioxide having a thickness in the range between 5,000 Å and 10,000 Å.
Claim 6
Dependent Claim
51 words
The method of claim 1 wherein, following step e, said InterLevel Dielectric layer in said fuse window opening has a depth of between about 2000 Å and 4000 Å; and said via hole extends into said anti-reflective coating to a depth in the range between about 50 Å and 200 Å.
Claim 7
Dependent Claim
22 words
The method of claim 1 wherein said fuse window opening has a width in the range between 10 μm and 20 μm.
Claim 8
Dependent Claim
26 words
The method of claim 1 wherein said adhesion layer (26) is composed of TiN having a thickness in the range between 500 Å and 1000 Å.
Claim 9
Dependent Claim
22 words
The method of claim 1 wherein said Tungsten layer (28) has a thickness in the range between 5,000 Å and 10,000 Å.
Claim 10
Dependent Claim
20 words
The method of claim 1 wherein said W-ring has a thickness in the range between 500 Å and 1000 Å.
Claim 11
Independent Claim
329 words
A method for simultaneous fabrication of an interlevel metal contact and a fuse window consisting of the steps of: a) providing a semiconductor substrate having an InterLevel Dielectric layer; said substrate having a device area with a first metal layer over said InterLevel Dielectric layer and a fuse area with a polysilicon fuse buried within said InterLevel Dielectric layer at a depth of at least 1 μm; b) forming an anti-reflective coating on said first metal layer; c) patterning said first metal layer and said anti-reflective coating to form a first metal line; d) forming an InterMetal Dielectric layer over said InterLevel Dielectric layer and said first metal line; e) patterning said InterMetal Dielectric layer, said InterLevel Dielectric layer, and said anti-reflective coating to simultaneously open a via hole extending partially into the anti-reflective coating and a fuse window opening extending into said InterLevel Dielectric layer to a depth less than half the depth of said fuse; said fuse window having sidewalls and bottoms; f) forming an adhesion layer over said InterMetal Dielectric layer, said anti-reflective coating, and said InterLevel Dielectric; g) blanket depositing a Tungsten layer on said adhesion layer; h) anisotropically etching said Tungsten layer; said etch stopping on said adhesion layer; thereby forming a W-plug in said via hole and a W-ring on said sidewalls of said fuse window opening; said W-ring having an inside wall; i) forming an upper metal layer on said adhesion layer, said W-plug, and said W-ring; j) patterning said upper metal layer using an anisotropic etch to form an upper metal line contacting said W-plug; said anisotropic etch forming an upper metal ring on said inside wall of said W-ring; k) forming a passivation layer over said upper metal layer, said InterMetal Dielectric layer, and said InterLevel Dielectric layer; l) forming a dielectric layer on said passivation layer; and m) patterning said dielectric layer and said passivation layer; thereby extending said fuse window through said passivation layer without exposing said fuse.
Claim 12
Independent Claim
329 words
A method for simultaneous fabrication of an interlevel metal contact and a fuse window consisting of the steps of: a) providing a semiconductor substrate having an InterLevel Dielectric layer; said substrate having a device area with a first metal layer over said InterLevel Dielectric layer and a fuse area with a polysilicon fuse buried within said InterLevel Dielectric layer at a depth of at least 1 μm; b) forming an anti-reflective coating on said first metal layer; c) patterning said first metal layer and said anti-reflective coating to form a first metal line; d) forming an InterMetal Dielectric layer over said InterLevel Dielectric layer and said first metal line; e) patterning said InterMetal Dielectric layer, said InterLevel Dielectric layer, and said anti-reflective coating to simultaneously open a via hole extending partially into the anti-reflective coating and a fuse window opening extending into said InterLevel Dielectric layer to a depth less than half the depth of said fuse; said fuse window having sidewalls and bottoms; f) forming an adhesion layer over said InterMetal Dielectric layer, said anti-reflective coating, and said InterLevel Dielectric; g) blanket depositing a Tungsten layer on said adhesion layer; h) anisotropically etching said Tungsten layer; said etch stopping on said adhesion layer; thereby forming a W-plug in said via hole and a W-ring on said sidewalls of said fuse window opening; said W-ring having an inside wall; i) forming an upper metal layer on said adhesion layer, said W-plug, and said W-ring; j) patterning said upper metal layer using an anisotropic etch to form an upper metal line contacting said W-plug; said anisotropic etch forming an upper metal ring on said inside wall of said W-ring; k) forming a passivation layer over said upper metal layer, said InterMetal Dielectric layer, and said InterLevel Dielectric layer; l) forming a dielectric layer on said passivation layer; and m) patterning said dielectric layer and said passivation layer; thereby extending said fuse window through said passivation layer without exposing said fuse.
Claim 13
Dependent Claim
26 words
The method of claim 10 wherein said polysilicon fuse is buried within said InterLevel Dielectric Layer at a depth of between 1 μm and 2 μm.
Claim 14
Dependent Claim
25 words
The method of claim 10 wherein said anti-reflective coating is composed of TiN having a thickness in the range between 1000 Å and 1500 Å.
Claim 15
Dependent Claim
27 words
The method of claim 10 wherein said InterMetal Dielectric layer is composed of silicon dioxide having a thickness in the range between 5,000 Å and 10,000 Å.
Claim 16
Dependent Claim
58 words
The method of claim 10 wherein, following the etch of step e, said InterLevel Dielectric layer in said fuse window opening has a depth of between about 2000 Å and 4000 Å, and following the etch of step m said InterLevel Dielectric layer in said fuse window opening has a depth of between about 0 and 2000 Å.
Claim 17
Dependent Claim
39 words
The method of claim 10 wherein said via hole (22) has a width in the range between 0.3 μm and 1 μm and said fuse window opening has a width in the range between 10 μm and 20 μm.
Claim 18
Dependent Claim
25 words
The method of claim 10 wherein said adhesion layer is composed of TiN having a thickness in the range between 500 Å and 1000 Å.
Claim 19
Dependent Claim
21 words
The method of claim 10 wherein said Tungsten layer has a thickness in the range between 5,000 Å and 10,000 Å.
Claim 20
Dependent Claim
20 words
The method of claim 10 wherein said W-ring has an thickness in the range between 50 Å and 1000 Å.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-12-27 | 2003-06-28 | 2003-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-12-27 | 2007-06-28 | 2007-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-12-27 | 2011-06-28 | 2011-12-28 | $7700.00 | Window Closed / Lapsed |