US5736433A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Double mask hermetic passivation method providing enhanced resistance to moisture
Assignee: STMicroelectronics lnc USA
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Filing: 1996-12-31
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Granted: 1998-04-07
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Expires: 2016-12-31
Abstract
Abstract A passivation structure is formed using two passivation layers and a protective overcoat layer using two masking steps. The first passivation layer is formed over the wafer and openings are provided to expose portions of the pads for testing the device and fusible links. After testing and laser repair, a second passivation layer is formed over the wafer followed a deposit of the protective overcoat. The protective overcoat is patterned and etched, exposing the pads. The remaining portions of the protective overcoat are used as a mask to remove portions of the second passivation layer overlying the pads. Leads are then attached to pads and the devices are encapsulated for packaging. The second passivation layer overlaps edge portions of the first passivation layer at the bond pads to enhance moisture resistance.
Inventors
- 👤 Frank R. Bryant
- 👤 Abha R. Singh
- 👤 James A. Cunningham
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 18:23
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/131; H10W74/137; H10P; H10P74/00; H10P74/23; H10P74/232; H10P74/20; H10P74/207
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
202 words
A method of forming a passivation structure over an integrated circuit of a type comprising pads and linking structures, the method comprising the steps of: forming a first passivation layer over the integrated circuit; removing portions of the first passivation layer overlying the pads and linking structures of the integrated circuit so that edge portions of the first passivation layer are exposed at the pads; testing the integrated circuit by probing the exposed pads; altering the condition of one or more of the linking structures based upon the testing, such that one or more of the linking structures are in a disconnected state; forming a second passivation layer over the entire surface of the integrated circuit; without using a pattern mask and etching the second passivation layer, forming a protective overcoat over the second passivation layer; removing portions of the protective overcoat adjacent the pads, thereby exposing portions of the second passivation layer; removing the exposed portions of the second passivation layer, and while leaving edge portions of the second passivation layer overlapping the exposed edge portions of the first passivation layer at the pads; and retaining patterned protective overcoat on the integrated circuit after exposing and etching the second passivation layer.
Claim 2
Independent Claim
202 words
A method of forming a passivation structure over an integrated circuit of a type comprising pads and linking structures, the method comprising the steps of: forming a first passivation layer over the integrated circuit; removing portions of the first passivation layer overlying the pads and linking structures of the integrated circuit so that edge portions of the first passivation layer are exposed at the pads; testing the integrated circuit by probing the exposed pads; altering the condition of one or more of the linking structures based upon the testing, such that one or more of the linking structures are in a disconnected state; forming a second passivation layer over the entire surface of the integrated circuit; without using a pattern mask and etching the second passivation layer, forming a protective overcoat over the second passivation layer; removing portions of the protective overcoat adjacent the pads, thereby exposing portions of the second passivation layer; removing the exposed portions of the second passivation layer, and while leaving edge portions of the second passivation layer overlapping the exposed edge portions of the first passivation layer at the pads; and retaining patterned protective overcoat on the integrated circuit after exposing and etching the second passivation layer.
Claim 3
Dependent Claim
42 words
A method of claim 1 wherein the step of removing portions of the protective overcoat comprises the steps of: forming a mask layer over portions of the protective overcoat; and etching portions of the protective overcoat not covered by the mask layer.
Claim 4
Dependent Claim
23 words
A method of claim 2 wherein the step of forming a protective overcoat comprises forming a polyimide layer over the second passivation layer.
Claim 5
Dependent Claim
27 words
A method of claim 3 wherein the step of etching portions of the protective overcoat comprises etching portions of the protective overcoat using an organic etch process.
Claim 6
Dependent Claim
32 words
A method of claim 3 wherein the step of step of removing exposed portions of the second passivation layer comprises removing exposed portions of the second passivation layer using a plasma etch.
Claim 7
Dependent Claim
26 words
A method of claim 1 wherein the step of altering the condition one or more of the linking structures comprises disconnecting one or more fusible links.
Claim 8
Dependent Claim
27 words
A method of claim 6 wherein the step of disconnecting one or more fusible links comprises the step of vaporizing portions of one or more fusible links.
Claim 9
Dependent Claim
22 words
A method of claim 7 wherein the step of vaporizing comprises the step of vaporizing portions of one or more polysilicon gates.
Claim 10
Dependent Claim
28 words
A method of claim 1 wherein the step of forming the first passivation layer comprises forming same from one of silicon dioxide, PSG, silicon oxynitride, or silicon nitride.
Claim 11
Dependent Claim
28 words
A method of claim 1 wherein the step of forming the second passivation layer comprises forming same from one of silicon dioxide, PSG, silicon oxynitride or silicon nitride.
Claim 12
Dependent Claim
35 words
A method of claim 1 wherein the step of forming the first passivation layer comprises forming same from PSG; and wherein the step of forming the second passivation layer comprises forming same from a nitride.
Claim 13
Independent Claim
218 words
A method of forming an integrated circuit comprising the steps of: forming devices in a substrate; forming pads overlying the substrate; forming linking structures for selectively linking devices; forming interconnects coupling ones of the devices and pads; forming a first passivation layer over the devices, pads, linking structures and interconnects; removing portions of the first passivation layer overlying the pads and linking structures of the integrated circuit so that edge portions of the first passivation layer are exposed at the pads; testing the integrated circuit by probing the exposed pads; altering the condition of one or more of the linking structures based upon the testing, such that one or more of the linking structures are in a disconnected state; forming a second passivation layer over the entire surface of the integrated circuit; without using a pattern mask and etching the second passivation layer, forming a protective overcoat over the second passivation layer; removing portions of the protective overcoat adjacent the pads, thereby exposing portions of the second passivation layer; removing the exposed portions of the second passivation layer, and while leaving edge portions of the second passivation layer overlapping the exposed edge portions of the first passivation layer at the pads; and retaining patterned protective overcoat on the integrated circuit after exposing and etching the second passivation layer.
Claim 14
Independent Claim
218 words
A method of forming an integrated circuit comprising the steps of: forming devices in a substrate; forming pads overlying the substrate; forming linking structures for selectively linking devices; forming interconnects coupling ones of the devices and pads; forming a first passivation layer over the devices, pads, linking structures and interconnects; removing portions of the first passivation layer overlying the pads and linking structures of the integrated circuit so that edge portions of the first passivation layer are exposed at the pads; testing the integrated circuit by probing the exposed pads; altering the condition of one or more of the linking structures based upon the testing, such that one or more of the linking structures are in a disconnected state; forming a second passivation layer over the entire surface of the integrated circuit; without using a pattern mask and etching the second passivation layer, forming a protective overcoat over the second passivation layer; removing portions of the protective overcoat adjacent the pads, thereby exposing portions of the second passivation layer; removing the exposed portions of the second passivation layer, and while leaving edge portions of the second passivation layer overlapping the exposed edge portions of the first passivation layer at the pads; and retaining patterned protective overcoat on the integrated circuit after exposing and etching the second passivation layer.
Claim 15
Dependent Claim
42 words
A method of claim 12 wherein the step of removing portions of the protective overcoat comprises the steps of: forming a mask layer over portions of the protective overcoat; and etching portions of the protective overcoat not covered by the mask layer.
Claim 16
Dependent Claim
23 words
A method of claim 13 wherein the step of forming a protective overcoat comprises forming a polyimide layer over the second passivation layer.
Claim 17
Dependent Claim
27 words
A method of claim 14 wherein the step of etching portions of the protective overcoat comprises etching portions of the protective overcoat using an organic etch process.
Claim 18
Dependent Claim
32 words
A method of claim 14 wherein the step of step of removing exposed portions of the second passivation layer comprises removing exposed portions of the second passivation layer using a plasma etch.
Claim 19
Dependent Claim
26 words
A method of claim 12 wherein the step of altering the condition one or more of the linking structures comprises disconnecting one or more fusible links.
Claim 20
Dependent Claim
27 words
A method of claim 17 wherein the step of disconnecting one or more fusible links comprises the step of vaporizing portions of one or more fusible links.
Claim 21
Dependent Claim
22 words
A method of claim 18 wherein the step of vaporizing comprises the step of vaporizing portions of one or more polysilicon gates.
Claim 22
Dependent Claim
28 words
A method of claim 19 wherein the step of forming the first passivation layer comprises forming same from one of silicon dioxide, PSG, silicon oxynitride, or silicon nitride.
Claim 23
Dependent Claim
28 words
A method of claim 12 wherein the step of forming the second passivation layer comprises forming same from one of silicon dioxide, PSG, silicon oxynitride or silicon nitride.
Claim 24
Dependent Claim
35 words
A method of claim 12 wherein the step of forming the first passivation layer comprises forming same from PSG; and wherein the step of forming the second passivation layer comprises forming same from a nitride.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-04-06 | 2001-10-06 | 2002-04-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-04-06 | 2005-10-06 | 2006-04-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-04-06 | 2009-10-06 | 2010-04-07 | $7700.00 | Window Closed / Lapsed |