US5235205A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Laser trimmed integrated circuit
Assignee: Intersil Corp
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Filing: 1992-03-17
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Granted: 1993-08-10
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Expires: 2012-03-17
Abstract
Abstract A method including covering the area to be laser trimmed with a first insulative layer having a thickness sufficiently thin that a layer can trim the area through the first insulative layer. An etch stop is formed on the first insulative layer over the area to be trimmed and covered with a second insulative layer. A portion of the second insulative layer is etched to expose the etch stop and a portion of the etch stop is then removed to expose a portion of the first insulative layer and laser trimming is conducted through the exposed first insulative layer. The etch stop is part of a first level of interconnects made of the same material and simultaneously with the etch stop. The area to be trimmed is part of a second level of contacts that interconnect another second material.
Inventors
- 👤 Maxwell W. Lippitt, III
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 20:15
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/066; H10W20/067; H10W20/068
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
104 words
An integrated circuit having a laser trimmed area comprising: a substrate having a first material; a first insulative layer covering said substrate, said first material and an area of said first material which has been laser trimmed through said first insulative layer forming a gap in said first material at said area; a second material on said first insulative layer including a portion having a first aperture exposing said first insulative layer juxtaposing said laser trimmed area; and a second insulative layer over said second material and said first insulative layer and having a second aperture exposing said first aperture in said second material.
Claim 2
Dependent Claim
104 words
An integrated circuit having a laser trimmed area comprising: a substrate having a first material; a first insulative layer covering said substrate, said first material and an area of said first material which has been laser trimmed through said first insulative layer forming a gap in said first material at said area; a second material on said first insulative layer including a portion having a first aperture exposing said first insulative layer juxtaposing said laser trimmed area; and a second insulative layer over said second material and said first insulative layer and having a second aperture exposing said first aperture in said second material.
Claim 3
Dependent Claim
18 words
An integrated circuit according to claim 1, wherein said first material is a semiconductor portion in said substrate.
Claim 4
Dependent Claim
18 words
An integrated circuit according to claim 2, wherein said first material is a portion of a memory array.
Claim 5
Dependent Claim
24 words
An integrated circuit according to claim 1, wherein said second material includes a first level of interconnects between said first and second insulative layers.
Claim 6
Dependent Claim
36 words
An integrated circuit according to claim 1, wherein said area to be laser trimmed is part of a second level of contacts and interconnects of said first material between said substrate and said first insulative layer.
Claim 7
Dependent Claim
30 words
An integrated circuit according to claim 1, including a third level of interconnects of a third material on said second insulative layer of a different material than said second material.
Claim 8
Dependent Claim
26 words
An integrated circuit according to claim 6, wherein said second and third materials are metals and said first material is a polycrystalline semiconductor on said substrate.
Claim 9
Dependent Claim
20 words
An integrated circuit according to claim 1, wherein said second material is selectively etchable compared to said second insulative layer.
References Cited (Backward Citations)
US4764485A
Cited
US4960729A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-08-09 | 1997-02-08 | 1997-08-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-09 | 2001-02-08 | 2001-08-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-09 | 2005-02-08 | 2005-08-10 | $7700.00 | Window Closed / Lapsed |