US5995915A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for the functional verification of digital electronic systems
Assignee: Advanced Micro Devices Inc
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Filing: 1997-01-29
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Granted: 1999-11-30
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Expires: 2017-01-29
Abstract
Abstract A method and apparatus capable of generating and executing large numbers of functional tests for complex digital electronic systems at low cost are presented. The apparatus includes a test generator which uses a decision tree representation of a verification space, derived from a functional specification of the digital electronic system, to generate functional tests. A decision tree representation of a verification space includes an initial goal node, a leaf goal node, and at least one intermediate goal node interconnected by a plurality of directed decision arcs formed between the initial goal node and the leaf goal node. Goal plans assigned to goal nodes include operations which generate functional tests. Functional tests are generated by recursively "walking" the decision tree, the choices of which goal node to visit next being made at random and according to decision weights assigned to each goal node. The decision weights assigned to each goal node in the decision tree may be adjusted to ensure all portions of the verification space are adequately tested. A testing system issues functional tests to both a golden device and a device under test. The testing system compares expected responses from the golden unit to responses from device under test and produces functional test results. Specialized structures called monitors ensure sets of functional tests (i.e., functional test suites) exercise all parts of a system implementation.
Inventors
- 👤 David F. Reed
- 👤 Adnan A. Hamid
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:17
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3183; G01R31/318314; G01R31/318307; G01R31/319; G01R31/3193
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
117 words
A method of verifying proper functional operation of a digital electronic system, comprising the steps of: generating a functional test using a decision tree representation of a verification space derived from a functional specification of the digital electronic system; applying the functional test to a device under test, said device under test configured to produce a response; applying the functional test to a golden device, said golden device configured to produce a response; comparing the response produced by the device under test to the response produced by the golden device; and producing a functional test result based on the comparison of the response produced by the device under test and the response produced by the golden device.
Claim 2
Independent Claim
117 words
A method of verifying proper functional operation of a digital electronic system, comprising the steps of: generating a functional test using a decision tree representation of a verification space derived from a functional specification of the digital electronic system; applying the functional test to a device under test, said device under test configured to produce a response; applying the functional test to a golden device, said golden device configured to produce a response; comparing the response produced by the device under test to the response produced by the golden device; and producing a functional test result based on the comparison of the response produced by the device under test and the response produced by the golden device.
Claim 3
Dependent Claim
47 words
The method as recited in claim 1, wherein said decision tree representation includes an initial goal node, a leaf goal node, and at least one intermediate goal node interconnected by a plurality of directed decision arcs formed between the initial goal node and the leaf goal node.
Claim 4
Dependent Claim
52 words
The method as recited in claim 2, wherein said generating comprises: assigning a goal plan to said initial goal node, said leaf goal node, and said at least one intermediate goal node, wherein each goal plan comprises at least one operation; and executing the goal plan assigned to said initial goal node.
Claim 5
Dependent Claim
34 words
The method as recited in claim 3, further comprising the step of assigning a decision weight to each intermediate goal note and the leaf goal node, wherein said assigning occurs prior to said executing.
Claim 6
Dependent Claim
81 words
The method as recited in claim 4, wherein the at least one operation of the goal plan assigned to the initial goal node and each intermediate goal node comprises: choosing a goal node directed to by a directed decision arc emanating from the current goal node at random and according to decision weights assigned to all goal nodes directed to by directed decision arcs emanating from the current goal node; and executing the goal plan assigned to the chosen goal node.
Claim 7
Independent Claim
152 words
A method of verifying proper functional operation of a digital electronic system, comprising: generating a functional test using a decision tree representation of a verification space derived from a functional specification of the digital electronic system, wherein said decision tree representation includes an initial goal node, a leaf goal node, and at least one intermediate goal node interconnected by a plurality of directed decision arcs formed between the initial goal node and the leaf goal node, and wherein said generating comprises: assigning a goal plan to said initial goal node, said leaf goal node, and said at least one intermediate goal node, wherein each goal plan comprises at least one operation; and executing the goal plan assigned to said initial goal node; applying the functional test to a device under test, said device under test configured to produce a first response; and producing a functional test result dependent upon said first response.
Claim 8
Independent Claim
152 words
A method of verifying proper functional operation of a digital electronic system, comprising: generating a functional test using a decision tree representation of a verification space derived from a functional specification of the digital electronic system, wherein said decision tree representation includes an initial goal node, a leaf goal node, and at least one intermediate goal node interconnected by a plurality of directed decision arcs formed between the initial goal node and the leaf goal node, and wherein said generating comprises: assigning a goal plan to said initial goal node, said leaf goal node, and said at least one intermediate goal node, wherein each goal plan comprises at least one operation; and executing the goal plan assigned to said initial goal node; applying the functional test to a device under test, said device under test configured to produce a first response; and producing a functional test result dependent upon said first response.
Claim 9
Dependent Claim
34 words
The method as recited in claim 6, further comprising the step of assigning a decision weight to each intermediate goal node and the leaf goal node, wherein said assigning occurs prior to said executing.
Claim 10
Dependent Claim
81 words
The method as recited in claim 7, wherein the at least one operation of the goal plan assigned to the initial goal node and each intermediate goal node comprises: choosing a goal node directed to by a directed decision arc emanating from the current goal node at random and according to decision weights assigned to all goal nodes directed to by directed decision arcs emanating from the current goal node; and executing the goal plan assigned to the chosen goal node.
Claim 11
Dependent Claim
33 words
The method as recited in claim 6, further comprising: applying the functional test to a golden device, said golden device configured to produce a second response; and comparing said first and second responses.
Claim 12
Dependent Claim
24 words
The method as recited in claim 9, wherein said functional test result is produced dependent upon the comparison of the first and second responses.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-11-29 | 2003-05-31 | 2003-11-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-11-29 | 2007-05-31 | 2007-11-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-11-29 | 2011-05-31 | 2011-11-30 | $7700.00 | Window Closed / Lapsed |