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US5991135A Expired / Lapsed US ⏱️ 0.0 years remaining

System including ESD protection

Assignee: NXP BV
•
Filing: 1998-05-11
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Granted: 1999-11-23
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Expires: 2018-05-11
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Abstract

Abstract A method and structure for providing ESD protection for an integrated circuit having multiple pairs of voltage supply rails, each pair including a VDD rail and a VSS rail. In one aspect, ESD devices are connected between pairs of supply rails and I/O pins of the integrated circuit, and antiparallel diodes are connected between respective VSS rails and a VSS-ESD rail.

Inventors

  • 👤 Farid Saleh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 12:56
CPC Classifications
H; H10; H10W; H10W42/00; H10W42/60; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W74/00; H10W90/00; H10W90/701; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 181 words
An integrated circuit comprising: an integrated circuit package including a housing and pins extending from the housing; a plurality of pairs of voltage supply rails, respective pairs including a VDD rail and a VSS rail; a plurality of circuits respectively coupled between pairs of voltage supply rails, the circuits respectively including I/O terminals; a VSS-ESD rail which does not form a part of any of the VSS rails; a plurality of ESD devices respectively coupled between pairs of VDD and VSS rails; a plurality of ESD devices respectively coupled between respective I/O terminals and respective VSS rails; and a plurality of antiparallel diodes coupling the respective VSS rails to the VSS-ESD rail, wherein the housing houses the plurality of pairs of voltage supply rails, the plurality of circuits, the VSS-ESD rail, the plurality of ESD devices coupled between pairs of VDD and VSS rails, and the plurality of ESD devices respectively coupled between respective I/O terminals and respective VSS rails, and wherein the I/O terminals, VDD rails, VSS rails, and VSS-ESD rail are coupled to pins of the integrated circuit package.
Claim 2
Dependent Claim 181 words
An integrated circuit comprising: an integrated circuit package including a housing and pins extending from the housing; a plurality of pairs of voltage supply rails, respective pairs including a VDD rail and a VSS rail; a plurality of circuits respectively coupled between pairs of voltage supply rails, the circuits respectively including I/O terminals; a VSS-ESD rail which does not form a part of any of the VSS rails; a plurality of ESD devices respectively coupled between pairs of VDD and VSS rails; a plurality of ESD devices respectively coupled between respective I/O terminals and respective VSS rails; and a plurality of antiparallel diodes coupling the respective VSS rails to the VSS-ESD rail, wherein the housing houses the plurality of pairs of voltage supply rails, the plurality of circuits, the VSS-ESD rail, the plurality of ESD devices coupled between pairs of VDD and VSS rails, and the plurality of ESD devices respectively coupled between respective I/O terminals and respective VSS rails, and wherein the I/O terminals, VDD rails, VSS rails, and VSS-ESD rail are coupled to pins of the integrated circuit package.
Claim 3
Dependent Claim 16 words
An integrated circuit in accordance with claim 1 wherein the VSS-ESD rail is a ground rail.
Claim 4
Dependent Claim 26 words
An integrated circuit in accordance with claim 1 wherein one of the circuits is a digital circuit and another of the circuits is an analog circuit.
Claim 5
Dependent Claim 39 words
An integrated circuit in accordance with claim 1 wherein one of the circuits is configured to operate at a first voltage and another of the circuits is configured to operate at a second voltage different from the first voltage.
Claim 6
Dependent Claim 43 words
An integrated circuit in accordance with claim 1 wherein one of the circuits is configured to operate in a first voltage range and another one of the circuits is configured to operate in a second voltage range different from the first voltage range.
Claim 7
Dependent Claim 20 words
An integrated circuit in accordance with claim 1 wherein one of the circuits interacts with another one of the circuits.
Claim 8
Independent Claim 120 words
A method of protecting electrical circuits, in an integrated circuit, from electrical overstress conditions, the electrical circuits including I/O nodes, at least one of the circuits interacting with at least one other of the circuits, the method comprising: providing respective pairs of voltage supply rails for respective circuits, the respective pairs including a VSS supply rail and a VDD supply rail; coupling ESD protection devices between the respective pairs of voltage supply rails; for respective circuits, coupling ESD protection devices between the I/O nodes and each supply rail of the pair of supply rails for the circuit; and coupling respective VSS supply rails to a VSS-ESD rail which does not form a part of any of the VSS supply rails.
Claim 9
Independent Claim 120 words
A method of protecting electrical circuits, in an integrated circuit, from electrical overstress conditions, the electrical circuits including I/O nodes, at least one of the circuits interacting with at least one other of the circuits, the method comprising: providing respective pairs of voltage supply rails for respective circuits, the respective pairs including a VSS supply rail and a VDD supply rail; coupling ESD protection devices between the respective pairs of voltage supply rails; for respective circuits, coupling ESD protection devices between the I/O nodes and each supply rail of the pair of supply rails for the circuit; and coupling respective VSS supply rails to a VSS-ESD rail which does not form a part of any of the VSS supply rails.
Claim 10
Dependent Claim 29 words
A method of protecting circuits in an integrated circuit from electrical overstress conditions in accordance with claim 7 and further comprising coupling the VSS-ESD rail to an electrical ground.
Claim 11
Dependent Claim 27 words
A method of protecting circuits in an integrated circuit from electrical overstress conditions in accordance with claim 7 wherein the circuits comprise both digital and analog circuits.
Claim 12
Dependent Claim 31 words
A method of protecting circuits in an integrated circuit from electrical overstress conditions in accordance with claim 7 and further comprising operating different circuits in the integrated circuit at different voltages.
Claim 13
Dependent Claim 60 words
A method of protecting circuits in an integrated circuit from electrical overstress conditions in accordance with claim 7 and further comprising configuring one of the circuits in the integrated circuit to operate in a first voltage range and configuring another of the circuits in the integrated circuit to operate in a second voltage range different from the first voltage range.
Claim 14
Dependent Claim 33 words
A method of protecting circuits in an integrated circuit from electrical overstress conditions in accordance with claim 7 and further comprising coupling the respective VDD rails to respective pins of the integrated circuit.

References Cited (Backward Citations)

US5196981A Cited
US5272097A Cited
US5311083A Cited
US5617283A Cited
US5468984A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-11-22 2003-05-24 2003-11-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-11-22 2007-05-24 2007-11-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-11-22 2011-05-24 2011-11-23 $7700.00 Window Closed / Lapsed

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