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Method and apparatus for improving gap-fill capability using chemical and physical etchbacks

Assignee: Applied Materials Inc
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Filing: 1997-02-20
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Granted: 1999-11-23
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Expires: 2017-02-20
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Abstract

Abstract A method and an apparatus for depositing a dielectric layer to fill in a gap between adjacent metal lines. In preferred embodiments of the method, a first dielectric layer is deposited over the lines and subsequently etched using both chemical and physical etchback steps. After the etchback steps are completed, a second dielectric layer is deposited over the first dielectric layer to fill in the gap.

Inventors

  • 👤 Soonil Hong
  • 👤 Choon Kun Ryu
  • 👤 Michael P. Nault
  • 👤 Kaushal K. Singh
  • 👤 Anthony Lam
  • 👤 Virendra V. S. Rana
  • 👤 Andrew Conners

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 00:10
CPC Classifications
H; H10; H10P; H10P95/00; H10P95/06

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 68 words
A process for depositing a layer on a substrate, said process comprising: depositing a first dielectric layer on said substrate; and etching back said first dielectric layer with both chemical and physical etchback steps wherein said etchback step comprises multiple alternating chemical and physical etchback steps thus enabling gaps having a width of less than 0.5 μm and an aspect ratio of more than 2 to be filled.
Claim 2
Dependent Claim 68 words
A process for depositing a layer on a substrate, said process comprising: depositing a first dielectric layer on said substrate; and etching back said first dielectric layer with both chemical and physical etchback steps wherein said etchback step comprises multiple alternating chemical and physical etchback steps thus enabling gaps having a width of less than 0.5 μm and an aspect ratio of more than 2 to be filled.
Claim 3
Dependent Claim 110 words
A process for filing in a gap between adjacent metal lines on a substrate, said process comprising the steps of: depositing a first layer of dielectric material over the adjacent metal lines to at least partially fill in the gap, said first dielectric layer having a void; chemically etching back said first dielectric layer to expose said void using a plasma etching process, said chemical etchback forming a sharp and narrow exposure where said void was; physically etching back said first dielectric layer through sputtering to smooth and widen the exposure; and depositing a second dielectric layer over said etched first layer, wherein said second layer substantially fills the exposure.
Claim 4
Dependent Claim 110 words
A process for filing in a gap between adjacent metal lines on a substrate, said process comprising the steps of: depositing a first layer of dielectric material over the adjacent metal lines to at least partially fill in the gap, said first dielectric layer having a void; chemically etching back said first dielectric layer to expose said void using a plasma etching process, said chemical etchback forming a sharp and narrow exposure where said void was; physically etching back said first dielectric layer through sputtering to smooth and widen the exposure; and depositing a second dielectric layer over said etched first layer, wherein said second layer substantially fills the exposure.
Claim 5
Dependent Claim 18 words
The process of claim 2 wherein CF 4 is used to chemically etch back said first dielectric layer.
Claim 6
Dependent Claim 18 words
The process of claim 2 wherein argon sputtering is used to physically etch back said first dielectric layer.
Claim 7
Dependent Claim 15 words
The process of claim 2 wherein said first dielectric layer comprises a TEFS-based FSG layer.
Claim 8
Dependent Claim 14 words
The process of claim 2 wherein said second dielectric layer comprises an FSG layer.
Claim 9
Dependent Claim 14 words
The process of claim 2 wherein said second dielectric layer comprises a USG layer.
Claim 10
Dependent Claim 34 words
The process of claim 2 wherein said gap has a width of less than or equal to 0.5 μm and said metal lines have an aspect ratio of greater than or equal to 2.
Claim 11
Dependent Claim 94 words
A process for depositing a multilayer insulating film on a semiconductor substrate having a plurality of raised conductive features formed thereon, said process comprising: depositing a first layer of said insulating film over said substrate so that said first layer covers said plurality of raised features and at least partially fills in gaps between said features; thereafter, etching said first layer using multiple alternating chemical and physical etches to remove a portion of said layer deposited in said gaps; and thereafter, depositing a second layer of said insulating film over said etched first layer.
Claim 12
Dependent Claim 94 words
A process for depositing a multilayer insulating film on a semiconductor substrate having a plurality of raised conductive features formed thereon, said process comprising: depositing a first layer of said insulating film over said substrate so that said first layer covers said plurality of raised features and at least partially fills in gaps between said features; thereafter, etching said first layer using multiple alternating chemical and physical etches to remove a portion of said layer deposited in said gaps; and thereafter, depositing a second layer of said insulating film over said etched first layer.
Claim 13
Dependent Claim 18 words
The process of claim 9 wherein said first and second layers are part of an intermetal dielectric film.
Claim 14
Dependent Claim 97 words
A process for depositing a multilayer insulating film on a semiconductor substrate having a plurality of raised conductive features formed thereon, said process comprising: depositing a first layer of said insulating film over said substrate so that said first layer covers said plurality of raised features and at least partially fills in gaps between said features; thereafter, and prior to depositing another layer over said first layer, etching back said first layer with a chemical plasma etching process followed by a sputtering process; thereafter, depositing a second layer of said insulating film over said etched first layer.
Claim 15
Dependent Claim 97 words
A process for depositing a multilayer insulating film on a semiconductor substrate having a plurality of raised conductive features formed thereon, said process comprising: depositing a first layer of said insulating film over said substrate so that said first layer covers said plurality of raised features and at least partially fills in gaps between said features; thereafter, and prior to depositing another layer over said first layer, etching back said first layer with a chemical plasma etching process followed by a sputtering process; thereafter, depositing a second layer of said insulating film over said etched first layer.
Claim 16
Dependent Claim 32 words
The process of claim 11 wherein said first layer of said insulating film is deposited over said raised features to a thickness that is less than a height of said raised features.
Claim 17
Dependent Claim 52 words
The process of claim 11 wherein the deposition process for said first layer of said insulating film forms a void in said layer in at least one gap between said raised features and wherein said etching process exposes said void so that it can be filled during the second layer deposition process.
Claim 18
Dependent Claim 17 words
The process of claim 13 wherein said first and second layers are part of an intermetal dielectric.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-11-22 2003-05-24 2003-11-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-11-22 2007-05-24 2007-11-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-11-22 2011-05-24 2011-11-23 $7700.00 Window Closed / Lapsed

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