US5982313A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High speed sigma-delta analog-to-digital converter system
Assignee: Analog Devices Inc
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Filing: 1997-06-06
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Granted: 1999-11-09
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Expires: 2017-06-06
Abstract
Abstract An ADC system includes a sigma-delta modulator that receives an analog input and provides a first digital output and an analog output. An ADC, coupled to the sigma-delta modulator, receives the analog output as an input and provides a second digital output. A digital processor, coupled to the sigma-delta modulator and the ADC, receives the first and second digital outputs and provides a digital representation of the analog input.
Inventors
- 👤 Todd L. Brooks
- 👤 David Robertson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 19:37
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/30; H03M3/458; H03M3/46; H03M1/00; H03M1/12; H03M1/14; H03M1/145; H03M1/16; H03M1/164; H03M3/39; H03M3/412; H03M3/422; H03M3/424; H03M3/436; H03M3/438; H03M3/454
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
73 words
An ADC system comprising: a multi-bit sigma-delta modulator that receives an analog input and provides a first digital output and an analog output; an ADC, coupled to the sigma-delta modulator, that receives the analog output as an input and provides a second digital output; and a digital processor, coupled to the sigma-delta modulator and the ADC, that receives the first and second digital outputs and provides a digital representation of the analog input.
Claim 2
Dependent Claim
73 words
An ADC system comprising: a multi-bit sigma-delta modulator that receives an analog input and provides a first digital output and an analog output; an ADC, coupled to the sigma-delta modulator, that receives the analog output as an input and provides a second digital output; and a digital processor, coupled to the sigma-delta modulator and the ADC, that receives the first and second digital outputs and provides a digital representation of the analog input.
Claim 3
Dependent Claim
16 words
An ADC system as claimed in claim 1 wherein the sigma-delta modulator includes a quantizer ADC.
Claim 4
Dependent Claim
22 words
The ADC system as claimed in claim 2 wherein the ADC has a throughput delay greater than that of the quantizer ADC.
Claim 5
Dependent Claim
18 words
The ADC system as claimed in claim 2 wherein the ADC has higher resolution than the quantizer ADC.
Claim 6
Dependent Claim
23 words
The ADC system as claimed in claim 1 wherein the first digital output is coupled to the digital processor with a delay element.
Claim 7
Dependent Claim
24 words
The ADC system as claimed in claim 1 wherein the sigma-delta modulator further includes a digital data scrambler in a multi-bit feedback loop thereof.
Claim 8
Dependent Claim
32 words
The ADC system as claimed in claim 1 wherein the digital processor includes a digital combiner that combines two digital signals equal to, or derived from, the first and second digital outputs.
Claim 9
Dependent Claim
35 words
The ADC system as claimed in claim 1 wherein the digital processor includes a digital filter having a transfer function with at least one term that approximates an analog transfer function of the sigma-delta modulator.
References Cited (Backward Citations)
US5153593A
Cited
US5124705A
Cited
US5084702A
Cited
US5200750A
Cited
US5162799A
Cited
US5030952A
Cited
US5329282A
Cited
US5274374A
Cited
US5274375A
Cited
US5257026A
Cited
US5406283A
Cited
US5369403A
Cited
US5305004A
Cited
US5404142A
Cited
US5627536A
Cited
US5682161A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-11-08 | 2003-05-10 | 2003-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-11-08 | 2007-05-10 | 2007-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-11-08 | 2011-05-10 | 2011-11-09 | $7700.00 | Window Closed / Lapsed |