US5162799A
Expired / Lapsed
US
⏱️ 0.0 years remaining
A/d (analog-to-digital) converter
Assignee: Toshiba Corp
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Filing: 1991-11-29
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Granted: 1992-11-10
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Expires: 2011-11-29
Abstract
Abstract An A/D converter comprises a first stage integrator for receiving an input signal, a last stage integrator, a multibit A/D converter connected to the output terminal of the last stage integrator, an outer feedback loop connected between the output terminal of the multi-bit A/D converter and the input terminal of said first stage integrator and having a 1-bit D/A converter, an inner feedback loop connected between the output terminal of the multibit A/D converter and the input terminal of the last stage integrator and having a multibit D/A converter, and a digital signal processing circuit, connected to the output terminal of the A/D converter, for performing digital signal processing of an output from the A/D converter to eliminate quantization noise caused by the outer feedback loop.
Inventors
- 👤 Hiroshi Tanimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 04:59
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/30; H03M3/39; H03M3/412; H03M3/42
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
177 words
An A/D converter comprising: a plurality of stages of integrating means having first stage integrating means for receiving an input signal and last stage integrating means; at least one A/D converting means connected to an output terminal of said last stage integrating means; at least one outer feedback loop connected from an output terminal of said A/D converting means to at least said first stage integrating means and including first D/A converting means; a plurality of inner feedback loops including second D/A converting means connected between the output terminal of said A/D converting means and said plurality of stages of integrating means arranged after said first stage integrating means; and means, connected to the output terminal of said A/D converting means, for performing digital signal processing of an output from said A/D converting means to eliminate quantization noise caused by said outer feedback loop, wherein said second D/A converting means included in said inner feedback loop has a number of quantization levels larger than that of said first D/A converting means used in said outer feedback loop.
Claim 2
Dependent Claim
177 words
An A/D converter comprising: a plurality of stages of integrating means having first stage integrating means for receiving an input signal and last stage integrating means; at least one A/D converting means connected to an output terminal of said last stage integrating means; at least one outer feedback loop connected from an output terminal of said A/D converting means to at least said first stage integrating means and including first D/A converting means; a plurality of inner feedback loops including second D/A converting means connected between the output terminal of said A/D converting means and said plurality of stages of integrating means arranged after said first stage integrating means; and means, connected to the output terminal of said A/D converting means, for performing digital signal processing of an output from said A/D converting means to eliminate quantization noise caused by said outer feedback loop, wherein said second D/A converting means included in said inner feedback loop has a number of quantization levels larger than that of said first D/A converting means used in said outer feedback loop.
Claim 3
Dependent Claim
44 words
The converter according to claim 1, wherein said first D/A converting means included in said outer feedback loop is constituted by a 1-bit D/A converter, and said second D/A converting means included in said inner feedback loops is constituted by a multibit D/A converter.
Claim 4
Dependent Claim
40 words
The converter according to claim 1, further comprising a plurality of coefficient multipliers, connected between said second D/A converting mean and said plurality of stage integrating means, for multiplying an output from said D/A converting means by a predetermined coefficient.
Claim 5
Dependent Claim
38 words
A converter according to claim 1, wherein said second D/A converting means is constituted by a plurality of multibit D/A converters connected between the output terminal of said A/D converting means and input terminals of said integrating means.
Claim 6
Dependent Claim
45 words
A converter according to claim 4, which further comprises a plurality of coefficient multipliers, connected between said plurality of stages of integrating means and said plurality of multibit D/A converters, for multiplying an output from each of said A/D converting means by a predetermined coefficient.
Claim 7
Dependent Claim
45 words
A converter according to claim 1, wherein said first D/A converting means is constituted by a 1-bit D/A converter connected to an input terminal of said first stage integrating means and an input terminal of next stage integrating means following said first stage integrating means.
Claim 8
Dependent Claim
83 words
A converter according to claim 1, wherein said first stage integrating means includes means for subtracting the input signal from an output from said first D/A converting means and outputting a subtraction result and an integrator for integrating the subtraction result, and each of other integrating means is constituted by means for subtracting an output from said first stage integrating means from an output from said second D/A converting means and outputting a subtraction result, and an integrator for integrating the subtraction result.
Claim 9
Dependent Claim
46 words
The A/D converter according to claim 1, wherein said means for performing digital signal processing comprises means for canceling the quantization noise caused by said outer feedback loop by an output signal of said A/D converting means and a sign bit signal within the output signal.
Claim 10
Dependent Claim
72 words
The A/D converter according to claim 1, wherein said means for performing digital signal processing includes means for subtracting a sign bit signal within an output signal from the output signal from said A/D converting means and outputting a difference signal, means for delaying the difference signal by a predetermined period and outputting a delayed signal, and means for adding the output signal from said A/D converting means and the delayed signal.
Claim 11
Dependent Claim
32 words
The A/D converter according to claim 1, wherein said A/D converting means has a full scale value larger than the maximum amplitude of an output signal from said last stage integrating means.
Claim 12
Dependent Claim
32 words
The A/D converter according to claim 1, wherein said A/D converting means has a full scale value larger than that of said first D/A converting means provided in said outer feedback loop.
Claim 13
Dependent Claim
39 words
The A/D converter according to claim 1, wherein said second D/A converting means used in said inner feedback loops has a full scale value larger than that of said first D/A converting means used in said outer feedback loop.
Claim 14
Dependent Claim
142 words
An A/D converter comprising: a plurality of stages of integrating means having first stage integrating means for receiving an input signal and last stage integrating means; a multibit A/D converter connected to an output terminal of said last integrating means; an outer feedback loop (FBL1) connected between an output terminal of said multibit A/D converter and an input terminal of said first stage integrating means and including a 1-bit D/A converter; an inner feedback loop (FBL0) including a multibit D/A converter connected between the output terminal of said multibit A/D converter and input terminals of said plurality of stage integrating means arranged after said first stage integrating means; and means, connected to the output terminal of said A/D converter, for performing digital signal processing of an output from said multibit A/D converter to eliminate quantization noise caused by said outer feedback loop.
Claim 15
Dependent Claim
142 words
An A/D converter comprising: a plurality of stages of integrating means having first stage integrating means for receiving an input signal and last stage integrating means; a multibit A/D converter connected to an output terminal of said last integrating means; an outer feedback loop (FBL1) connected between an output terminal of said multibit A/D converter and an input terminal of said first stage integrating means and including a 1-bit D/A converter; an inner feedback loop (FBL0) including a multibit D/A converter connected between the output terminal of said multibit A/D converter and input terminals of said plurality of stage integrating means arranged after said first stage integrating means; and means, connected to the output terminal of said A/D converter, for performing digital signal processing of an output from said multibit A/D converter to eliminate quantization noise caused by said outer feedback loop.
Claim 16
Dependent Claim
39 words
The A/D converter according to claim 13, further comprising a plurality of coefficient multi-pliers, connected between said multibit D/A converter and said plurality of integrating means, for multiplying an output from said multibit D/A converter by a predetermined coefficient.
Claim 17
Dependent Claim
79 words
The converter according to claim 13, wherein said first integrating means includes means for subtracting the input signal from an output from said first D/A converting means and outputting a subtraction result, and an integrator for integrating the subtraction result, and each of other integrating means includes means for subtracting an output from said first integrating means from a output from said second D/A converting means and outputting a subtraction result, and an integrator for integrating the subtraction result.
Claim 18
Dependent Claim
70 words
The A/D converter according to claim 13, wherein said means for performing digital signal processing includes means for subtracting a sign bit signal of an output signal from the output signal from said A/D converter and outputting a difference signal, means for delaying the difference signal by a predetermined period and outputting a delayed signal, and means for generating the output signal from said A/D converter and the delayed signal.
Claim 19
Dependent Claim
36 words
The converter according to claim 13, wherein said multibit D/A converter used in said inner feedback loops has a full scale value larger than that of said 1-bit D/A converter used in said outer feedback loop.
References Cited (Backward Citations)
JPH01196922A
Cited
US5027120A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-11-10 | 1996-05-11 | 1996-11-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-11-10 | 2000-05-11 | 2000-11-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-11-10 | 2004-05-11 | 2004-11-10 | $7700.00 | Window Closed / Lapsed |