Patent US5981377A successfully refreshed from Google Patents.
US5981377A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device with improved trench interconnected to connection plug mating and method of making same
Assignee: Sony Corp
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Filing: 1998-02-27
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Granted: 1999-11-09
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Expires: 2018-02-27
Abstract
Abstract Disclosed is a semiconductor device having a structure in which even if a misalignment occurs an upper trench and a connection hole, that is, the upper trench is offset from the connection hole, it is possible to suppress a reduction in contact area between an interconnection material and a connection hole burying material and hence to reduce an increase in contact resistance, and which is particularly suitable for a borderless trench interconnection structure, and a method of fabricating the semiconductor device. The semiconductor device includes: a substrate; an interlayer insulating film formed on the substrate; a connection hole formed in the interlayer insulating film; a connection plug formed by burying the connection hole with a connection hole burying material; a trench formed in the interlayer insulating film; and a trench interconnection formed by burying the trench with an interconnection material. In such a semiconductor device, the connection plug enters in the trench interconnection in such a manner that at least part of a side surface of sid connection plug is brought in contact with the trench interconnection.
Inventors
- 👤 Kazuhide Koyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 06:38
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/031; H10W20/063; H10W20/084; H10W20/40; H10W20/41; H10W20/42
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
145 words
A semiconductor device comprising: a substrate; an interlayer insulating film formed on said substrate, said interlayer insulating film comprising an etching stop layer disposed between upper and lower insulating layers; a connection hole formed in said interlayer insulating film through said upper and lower insulating layers and said etching stop layer; a connection plug formed by burying said connection hole with a connection hole burying material, said connection plug comprising in cross section a rectangle extending between said upper and lower insulating layers; a trench formed in said interlayer insulating film in said upper insulating layer; and a trench interconnection formed by burying said trench with an interconnection material; wherein said connection plug enters in said trench interconnection in such a manner that at least part of a side surface of said connection plug is brought in contact with said trench interconnection in said trench.
Claim 2
Dependent Claim
145 words
A semiconductor device comprising: a substrate; an interlayer insulating film formed on said substrate, said interlayer insulating film comprising an etching stop layer disposed between upper and lower insulating layers; a connection hole formed in said interlayer insulating film through said upper and lower insulating layers and said etching stop layer; a connection plug formed by burying said connection hole with a connection hole burying material, said connection plug comprising in cross section a rectangle extending between said upper and lower insulating layers; a trench formed in said interlayer insulating film in said upper insulating layer; and a trench interconnection formed by burying said trench with an interconnection material; wherein said connection plug enters in said trench interconnection in such a manner that at least part of a side surface of said connection plug is brought in contact with said trench interconnection in said trench.
Claim 3
Dependent Claim
24 words
A semiconductor device according to claim 1, wherein said connection plug passes through said trench interconnection and reaches a surface of said trench interconnection.
Claim 4
Dependent Claim
32 words
A semiconductor device according to claim 1, wherein an upper surface of said connection plug is positioned between a bottom portion of said trench interconnection and a surface of said trench interconnection.
Claim 5
Dependent Claim
25 words
A semiconductor device according to claim 1 wherein said connection plug is a tungsten plug or an aluminum plug formed by chemical vapor deposition (CVD).
Claim 6
Independent Claim
175 words
A method of fabricating a semiconductor device, comprising: a step (a) of forming an interlayer insulating film on a substrate, said interlayer insulating film comprising an etching strip layer formed between upper and lower insulating layers; a step (b) of forming a connection hole in said insulating film through said upper and lower insulating layers and said etching stop layer; a step (c) of burying said connection hole with a connection hole burying material to form a connection plug, said connection plug comprising in cross section a rectangle extending between said upper and lower insulating layers; a step (d) of forming a trench in said insulating film in said upper insulating layer; and a step (e) of burying said trench with an interconnection material to form a trench interconnection; wherein the formation of said trench in said step (d) is performed in such a manner that at least part of a side wall of said connection plug buried in said connection hole is exposed in said trench and brought into contact with said trench interconnection.
Claim 7
Independent Claim
175 words
A method of fabricating a semiconductor device, comprising: a step (a) of forming an interlayer insulating film on a substrate, said interlayer insulating film comprising an etching strip layer formed between upper and lower insulating layers; a step (b) of forming a connection hole in said insulating film through said upper and lower insulating layers and said etching stop layer; a step (c) of burying said connection hole with a connection hole burying material to form a connection plug, said connection plug comprising in cross section a rectangle extending between said upper and lower insulating layers; a step (d) of forming a trench in said insulating film in said upper insulating layer; and a step (e) of burying said trench with an interconnection material to form a trench interconnection; wherein the formation of said trench in said step (d) is performed in such a manner that at least part of a side wall of said connection plug buried in said connection hole is exposed in said trench and brought into contact with said trench interconnection.
Claim 8
Dependent Claim
22 words
A method of fabricating a semiconductor device according to claim 5, wherein said etching stopper layer is a SiN (silicon nitride) layer.
Claim 9
Independent Claim
209 words
A method of fabricating a semiconductor device, comprising: a step (A) of forming an interlayer insulating film on a substrate, said interlayer insulating film comprising an etching strip layer formed between upper and lower insulating layers; a step (B) of forming a connection hole in said insulating film through said upper and lower insulating layers and said etching stop layer; a step (C) of burying said connection hole with a connection hole burying material to form a connection plug, said connection plug comprising in cross section a rectangle extending between said upper and lower insulating layers; a step (D) of additionally forming an insulating film on said interlayer insulating film; a step (E) of forming a trench in said insulating film and said first upper insulating layer of said interlayer insulating film; and a step (F) of burying said trench with an interconnection material to form a trench interconnection; wherein the formation of said trench at said step (E) is performed in such a manner that at least part of a side wall of said connection plug buried in said connection hole at said step (C) is exposed in said trench and at least a side wall of said connection plug is brought into contact with said trench interconnection.
Claim 10
Independent Claim
209 words
A method of fabricating a semiconductor device, comprising: a step (A) of forming an interlayer insulating film on a substrate, said interlayer insulating film comprising an etching strip layer formed between upper and lower insulating layers; a step (B) of forming a connection hole in said insulating film through said upper and lower insulating layers and said etching stop layer; a step (C) of burying said connection hole with a connection hole burying material to form a connection plug, said connection plug comprising in cross section a rectangle extending between said upper and lower insulating layers; a step (D) of additionally forming an insulating film on said interlayer insulating film; a step (E) of forming a trench in said insulating film and said first upper insulating layer of said interlayer insulating film; and a step (F) of burying said trench with an interconnection material to form a trench interconnection; wherein the formation of said trench at said step (E) is performed in such a manner that at least part of a side wall of said connection plug buried in said connection hole at said step (C) is exposed in said trench and at least a side wall of said connection plug is brought into contact with said trench interconnection.
Claim 11
Dependent Claim
33 words
A method of fabricating a semiconductor device according to claim 7, wherein after said interlayer insulating film is formed, a surface of said upper insulating layer is planarized by chemical mechanical polishing (CMP).
Claim 12
Dependent Claim
37 words
A method of fabricating a semiconductor device according to claim 7, wherein said interlayer insulating film has a thickness sufficient to form said connection hole therein but insufficient to form said trench in said upper insulating layer.
Claim 13
Dependent Claim
20 words
A method of fabricating a semiconductor device according to claim 8, wherein said etching stopper layer is a SiN layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-11-08 | 2003-05-10 | 2003-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-11-08 | 2007-05-10 | 2007-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-11-08 | 2011-05-10 | 2011-11-09 | $7700.00 | Window Closed / Lapsed |