Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
86 words
A processor comprising: a processor core supporting running of a software system, the software system including input/output function calls; and a debug interface coupled to the processor core and connectable to an external software debug device, the external software debug device detecting operating signals generated by the processor core during running of the software system; wherein the software system transfers debug information via the debug interface using the input/output function calls while the processor core continues execution during a data transfer of the input/output function calls.
Claim 2
Dependent Claim
86 words
A processor comprising: a processor core supporting running of a software system, the software system including input/output function calls; and a debug interface coupled to the processor core and connectable to an external software debug device, the external software debug device detecting operating signals generated by the processor core during running of the software system; wherein the software system transfers debug information via the debug interface using the input/output function calls while the processor core continues execution during a data transfer of the input/output function calls.
Claim 3
Dependent Claim
17 words
A processor core according to claim 1 wherein: an input/output function call is a printf( ) function.
Claim 4
Dependent Claim
25 words
A processor core according to claim 1 wherein: the debug interface includes a parallel trace port that transfers data responsive to an input/output function call.
Claim 5
Dependent Claim
28 words
A processor core according to claim 3 wherein: the parallel debug port is supplied as a bond-out port accessible when the processor is packaged in a bond-out package.
Claim 6
Dependent Claim
25 words
A processor core according to claim 1 wherein: the debug interface includes a parallel debug port that transfers data responsive to an input/output function call.
Claim 7
Dependent Claim
28 words
A processor core according to claim 5 wherein: the parallel debug port is supplied as a bond-out port accessible when the processor is packaged in a bond-out package.
Claim 8
Dependent Claim
25 words
A processor core according to claim 1 wherein: the debug interface includes a serial debug port that transfers data responsive to an input/output function call.
Claim 9
Dependent Claim
24 words
A processor core according to claim 7 wherein: the serial debug port is compliant with the IEEE-1149.1-1990 JTAG interface standard or other similar standard.
Claim 10
Dependent Claim
27 words
A processor core according to claim 7 wherein: wherein the serial port includes a plurality of pins for carrying conventional JTAG signals TMS, TCK, TDI and TDO.
Claim 11
Dependent Claim
31 words
A processor core according to claim 9 wherein: the serial port further includes at least one additional pin to facilitate communication between the external software debug device and the processor core.
Claim 12
Dependent Claim
67 words
A processor core according to claim 10 wherein: the serial port further includes a plurality of additional pins to facilitate communication between the external software debug device and the processor core, the additional pins supporting sideband signals including: a command acknowledge signal (CMDACK); a dual-purpose break execution and trace control signal (BRTC); an execution stopped and receive data signal (STOPTX); and an off-chip trigger event signal (TRIG).
Claim 13
Dependent Claim
43 words
A processor core according to claim 1 further comprising: a trace buffer coupled to the debug interface and coupled to the processor core, wherein the debug interface, wherein an input/output function call supports software system access to information stored in the trace buffer.
Claim 14
Dependent Claim
52 words
A processor core according to claim 1 wherein: the debug interface includes a serial debug port and a parallel debug port; and the input/output function calls perform transmission of debug information between the external software debug device and the processor core, the parallel debug port being enabled through the serial debug port.
Claim 15
Independent Claim
111 words
A method of operating a processor including a processor core and a debug interface for connecting the processor core to an external software debug device, the method comprising: running a software system on the processor core, the software system including input/output function calls; executing a debug program on the external software debug device, the debug program for analyzing operating signals of the processor core; via the external software debug device, detecting operating signals generated by the processor core during running of the software system; transferring debug information via the debug interface using the input/output function calls while the processor core continues execution during a data transfer of the input/output function calls.
Claim 16
Independent Claim
111 words
A method of operating a processor including a processor core and a debug interface for connecting the processor core to an external software debug device, the method comprising: running a software system on the processor core, the software system including input/output function calls; executing a debug program on the external software debug device, the debug program for analyzing operating signals of the processor core; via the external software debug device, detecting operating signals generated by the processor core during running of the software system; transferring debug information via the debug interface using the input/output function calls while the processor core continues execution during a data transfer of the input/output function calls.
Claim 17
Dependent Claim
30 words
A method according to claim 14 wherein: an input/output function call is selected from among a printf( ) function, a scanf( ) function, a read service, and a write service.
Claim 18
Dependent Claim
100 words
A processor circuit comprising: an integrated circuit chip; a processor core fabricated on the integrated circuit chip, the processor core supporting running of a software system, the software system including input/output function calls; and a debug interface coupled to the processor core and connectable to an external software debug device, the external software debug device detecting operating signals generated by the processor core during running of the software system; wherein the software system transfers debug information via the debug interface using the input/output function calls while the processor core continues execution during a data transfer of the input/output function calls.
Claim 19
Dependent Claim
100 words
A processor circuit comprising: an integrated circuit chip; a processor core fabricated on the integrated circuit chip, the processor core supporting running of a software system, the software system including input/output function calls; and a debug interface coupled to the processor core and connectable to an external software debug device, the external software debug device detecting operating signals generated by the processor core during running of the software system; wherein the software system transfers debug information via the debug interface using the input/output function calls while the processor core continues execution during a data transfer of the input/output function calls.