← Back to Patent Explorer
US5972771A Expired / Lapsed US ⏱️ 0.0 years remaining

Enhancing semiconductor structure surface area using HSG and etching

Assignee: Round Rock Research LLC
•
Filing: 1996-10-03
•
Granted: 1999-10-26
•
Expires: 2016-10-03
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for forming HSG polysilicon with reduced dielectric bridging and increased capacitance. A first polysilicon layer is deposited and doped with impurities to increase conductivity. A second polysilicon layer is deposited at a reduced temperature to cause a nucleation of the second polysilicon layer. Grains are formed on the surface of the second polysilicon layer as a result of the nucleation. Next a wet etch is performed to remove portions of the polysilicon grains and portions of the first polysilicon layer. The duration of the wet etch is controlled to retain a roughened surface area. The size of the grains decreases during the wet etch and the distance between the grains increases. A dielectric layer is deposited to overlie the rough polysilicon following the wet etch. The thickness of the dielectric layer tends to be uniform thereby reducing bridging of the dielectric between the grains of the of the polysilicon.

Inventors

  • 👤 Thomas A. Figura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 21:17
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/712; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/945; Y10S438/964

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 58 words
A method for forming a capacitor plate, comprising the following steps: forming an undoped polysilicon layer having a hemispherical grained surface overlying a substrate; and etching said undoped polysilicon layer to decrease a size of said grains and to increase a distance between said grains, said undoped polysilicon layer forming at least a portion of the capacitor plate.
Claim 2
Independent Claim 58 words
A method for forming a capacitor plate, comprising the following steps: forming an undoped polysilicon layer having a hemispherical grained surface overlying a substrate; and etching said undoped polysilicon layer to decrease a size of said grains and to increase a distance between said grains, said undoped polysilicon layer forming at least a portion of the capacitor plate.
Claim 3
Dependent Claim 33 words
The method as specified in claim 1, wherein said step of forming said polysilicon layer comprises depositing said polysilicon layer at a temperature and pressure that forms hemispherical grains of said polysilicon layer.
Claim 4
Independent Claim 87 words
A method for forming a capacitor, comprising the following steps: providing a granulated undoped first polysilicon capacitor storage plate having a plurality of grains on a surface thereof; performing a wet etch of said undoped first polysilicon capacitor storage plate without masking of said undoped first polysilicon capacitor storage plate, thereby decreasing a size of said grains and increasing a distance between said grains; forming a dielectric layer to overlie said first polysilicon capacitor storage plate; and forming a second capacitor storage plate overlying said dielectric layer.
Claim 5
Independent Claim 87 words
A method for forming a capacitor, comprising the following steps: providing a granulated undoped first polysilicon capacitor storage plate having a plurality of grains on a surface thereof; performing a wet etch of said undoped first polysilicon capacitor storage plate without masking of said undoped first polysilicon capacitor storage plate, thereby decreasing a size of said grains and increasing a distance between said grains; forming a dielectric layer to overlie said first polysilicon capacitor storage plate; and forming a second capacitor storage plate overlying said dielectric layer.
Claim 6
Dependent Claim 29 words
The method as specified in claim 3, wherein said step of forming said dielectric layer comprises depositing a conformal dielectric material to overlie said first polysilicon capacitor storage plate.
Claim 7
Independent Claim 133 words
A method for forming a capacitor, comprising the following steps: forming an undoped polysilicon base layer to overlie a substrate, said undoped polysilicon base layer functioning as a storage node capacitor plate of said capacitor; adjusting a temperature and pressure of said undoped polysilicon base layer to form grains of said undoped polysilicon base layer on a surface of said undoped polysilicon base layer; performing a wet etch of said undoped polysilicon base layer; controlling a duration of said wet etch to control a surface area of said undoped polysilicon base layer remaining subsequent to said wet etch; forming a dielectric layer to overlie said base layer; and forming a cell plate layer to overlie said dielectric layer, wherein said base layer, said dielectric layer and said cell plate layer form said capacitor.
Claim 8
Independent Claim 133 words
A method for forming a capacitor, comprising the following steps: forming an undoped polysilicon base layer to overlie a substrate, said undoped polysilicon base layer functioning as a storage node capacitor plate of said capacitor; adjusting a temperature and pressure of said undoped polysilicon base layer to form grains of said undoped polysilicon base layer on a surface of said undoped polysilicon base layer; performing a wet etch of said undoped polysilicon base layer; controlling a duration of said wet etch to control a surface area of said undoped polysilicon base layer remaining subsequent to said wet etch; forming a dielectric layer to overlie said base layer; and forming a cell plate layer to overlie said dielectric layer, wherein said base layer, said dielectric layer and said cell plate layer form said capacitor.
Claim 9
Independent Claim 62 words
A method for increasing a polysilicon surface area, comprising: forming a polysilicon structure having a surface and a surface area, comprising: forming a first polysilicon layer; forming a second polysilicon layer having a hemispherical grained surface on the first polysilicon layer; and etching into the surface of the polysilicon structure such that the surface is more roughened, thus increasing the surface area.
Claim 10
Independent Claim 62 words
A method for increasing a polysilicon surface area, comprising: forming a polysilicon structure having a surface and a surface area, comprising: forming a first polysilicon layer; forming a second polysilicon layer having a hemispherical grained surface on the first polysilicon layer; and etching into the surface of the polysilicon structure such that the surface is more roughened, thus increasing the surface area.
Claim 11
Dependent Claim 16 words
The method of claim 6, wherein the etching removes material only from the second polysilicon layer.
Claim 12
Dependent Claim 17 words
The method of claim 6, wherein the etching removes material of the first and second polysilicon layers.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-10-25 2003-04-26 2003-10-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-10-25 2007-04-26 2007-10-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-10-25 2011-04-26 2011-10-26 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag