Patent US5963471A successfully refreshed from Google Patents.
US5963471A
Expired / Lapsed
US
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Semiconductor device
Assignee: Toshiba Corp
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Filing: 1998-05-08
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Granted: 1999-10-05
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Expires: 2018-05-08
Abstract
Abstract A semiconductor integrated circuit comprising a first functional block consisting essentially of a first circuit which includes a small junction device, and a second functional block consisting essentially of a second circuit which includes a field effect transistor, the second functional block being mutually connected to the first functional block.
Inventors
- 👤 Akiko Ohata
- 👤 Akira Toriumi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 15:26
CPC Classifications
B; B82; B82Y; B82Y10/00; H; H10; H10D; H10D30/00; H10D30/40; H10D30/402; H10D89/00; H10D89/10; Y; Y10; Y10S; Y10S977/00; Y10S977/902; Y10S977/932; Y10S977/936; Y10S977/937
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
66 words
A semiconductor device comprising: a circuit block including a small tunnel junction device; and a circuit for reading a charge in said small tunnel junction device, wherein said small tunnel junction device has a first electrode and a second electrode for controlling the first electrode, and outputs as data a charge transferred during a predetermined period for which a voltage at said second electrode is swept.
Claim 2
Dependent Claim
66 words
A semiconductor device comprising: a circuit block including a small tunnel junction device; and a circuit for reading a charge in said small tunnel junction device, wherein said small tunnel junction device has a first electrode and a second electrode for controlling the first electrode, and outputs as data a charge transferred during a predetermined period for which a voltage at said second electrode is swept.
Claim 3
Dependent Claim
57 words
A semiconductor device comprising: a circuit block including a small tunnel junction device; and a circuit for reading a charge in said small tunnel junction device, wherein said small tunnel junction device has a first electrode and a second electrode for controlling the first electrode, and outputs as data a capacitance between said first and second electrodes.
Claim 4
Dependent Claim
57 words
A semiconductor device comprising: a circuit block including a small tunnel junction device; and a circuit for reading a charge in said small tunnel junction device, wherein said small tunnel junction device has a first electrode and a second electrode for controlling the first electrode, and outputs as data a capacitance between said first and second electrodes.
Claim 5
Dependent Claim
149 words
A semiconductor device comprising: a semiconductor substrate; an insulating layer provided on said semiconductor substrate; a semiconductor layer provided on said insulating layer and having first and second regions; a field-effect transistor provided in the first region of said semiconductor layer; and a single-electron transistor provided in the second region of said semiconductor layer; wherein said single-electron transistor has an intermediate electrode located in the second region of said semiconductor layer, and said field-effect transistor includes: a source region and a drain region spaced apart from the first region; a channel region located between said source and drain regions and having side walls on both sides thereof; a pair of gate insulating films provided on the side walls of said channel region, respectively; a first gate electrode provided on one of said gate insulating films; and a second gate electrode provided on the other of said gate insulating films.
Claim 6
Dependent Claim
149 words
A semiconductor device comprising: a semiconductor substrate; an insulating layer provided on said semiconductor substrate; a semiconductor layer provided on said insulating layer and having first and second regions; a field-effect transistor provided in the first region of said semiconductor layer; and a single-electron transistor provided in the second region of said semiconductor layer; wherein said single-electron transistor has an intermediate electrode located in the second region of said semiconductor layer, and said field-effect transistor includes: a source region and a drain region spaced apart from the first region; a channel region located between said source and drain regions and having side walls on both sides thereof; a pair of gate insulating films provided on the side walls of said channel region, respectively; a first gate electrode provided on one of said gate insulating films; and a second gate electrode provided on the other of said gate insulating films.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-10-04 | 2003-04-05 | 2003-10-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-10-04 | 2007-04-05 | 2007-10-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-10-04 | 2011-04-05 | 2011-10-05 | $7700.00 | Window Closed / Lapsed |