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US5962917A
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Semiconductor device package having end-face halved through-holes and inside-area through-holes
Assignee: NEC Electronics Corp
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Filing: 1998-03-31
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Granted: 1999-10-05
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Expires: 2018-03-31
Abstract
Abstract A semiconductor device package comprises a circuit substrate, a semiconductor device chip mounted on the circuit substrate, a plurality of end-face halved through-holes formed on an end-face of the circuit substrate, in the form obtained by halving a through hole along its center axis, and having an inner side surface coated with a conductor film, a plurality of wiring conductors formed on an upper surface of the circuit substrate and connected to the end-face halved through-holes, a plurality of external electrode conductors formed on a lower surface of the circuit substrate and connected to the end-face halved through-holes, and a solder resist provided to partially cover the external electrode conductors for separating an end of the external electrode conductors from the end-face halved through-holes. The semiconductor device package further includes a plurality of inside-area through-holes formed in an area of the circuit substrate other than the end-face of the circuit substrate, a plurality of additional external electrode conductors formed on the other surface of the circuit substrate and connected to the inside-area through-holes, and an additional solder resist provided to partially cover the additional external electrode conductors for separating an end of the additional external electrode conductors from the inside-area through-holes.
Inventors
- 👤 Yoshifumi Moriyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 08:28
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/117; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/3452; H10W70/00; H10W70/60; H10W70/62; H10W70/63; H10W70/635; H10W70/65; H10W70/657; H10W90/00; H10W90/701; H05K2201/00; H05K2201/09; H05K2201/09818; H05K2201/09909; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10734; H05K3/0094; H05K3/341; H05K3/3431; H05K3/3436; H05K3/36; H05K3/368; H05K3/40; H05K3/403; H10W70/67; H10W70/68; H10W70/682; H10W72/00; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/851; H10W72/874; H10W72/884; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
128 words
A semiconductor device package comprising a circuit substrate, at least one electronic component mounted on said circuit substrate, a plurality of end-face halved through-holes formed on an end-face of said circuit substrate, said plurality of end-face halved through holes each having a side surface coated with a conductor film, a plurality of wiring conductors formed on a first surface of said circuit substrate and connected to said end-face halved through-holes, a plurality of external electrodes formed on a second surface of said circuit substrate and connected to said end-face halved through-holes, and a conductor protecting layer provided to cover a region between an inner end of said external electrodes and said end-face halved through-holes for separating said inner end of said external electrodes from said end-face halved through-holes.
Claim 2
Dependent Claim
128 words
A semiconductor device package comprising a circuit substrate, at least one electronic component mounted on said circuit substrate, a plurality of end-face halved through-holes formed on an end-face of said circuit substrate, said plurality of end-face halved through holes each having a side surface coated with a conductor film, a plurality of wiring conductors formed on a first surface of said circuit substrate and connected to said end-face halved through-holes, a plurality of external electrodes formed on a second surface of said circuit substrate and connected to said end-face halved through-holes, and a conductor protecting layer provided to cover a region between an inner end of said external electrodes and said end-face halved through-holes for separating said inner end of said external electrodes from said end-face halved through-holes.
Claim 3
Dependent Claim
90 words
A semiconductor device package claimed in claim 1, further including a plurality of inside-area through-holes formed in an area of said circuit substrate other than an end face region of said circuit substrate, a plurality of additional external electrodes formed on the second surface of said circuit substrate to extend from said inside-area through-holes, and an additional conductor protecting layer provided to cover a region between an end of said additional external electrodes and said inside-area through-holes for separating said end of said additional external electrodes from said inside-area through-holes.
Claim 4
Dependent Claim
27 words
A semiconductor device package claimed in claim 1, wherein said conductor protecting layer extends to cover at least a portion of each of said end-face halved through-holes.
Claim 5
Dependent Claim
26 words
A semiconductor device package claimed in claim 1, wherein said conductor protecting layer extends to cover the whole surface of each of said end-face halved through-holes.
Claim 6
Dependent Claim
24 words
A semiconductor device package claimed in claim 1, wherein a bump solder electrode is formed on said end of each of said external electrodes.
Claim 7
Dependent Claim
18 words
A semiconductor device package claimed in claim 1, wherein said conductor protecting layer is formed of epoxy resin.
Claim 8
Dependent Claim
27 words
A semiconductor device package claimed in claim 2, wherein said conductor protecting layer extends to cover at least a portion of each of said end-face halved through-holes.
Claim 9
Dependent Claim
26 words
A semiconductor device package claimed in claim 2, wherein said conductor protecting layer extends to cover the whole surface of each of said end-face halved through-holes.
Claim 10
Dependent Claim
24 words
A semiconductor device package claimed in claim 2, wherein a bump solder electrode is formed on said end of each of said external electrodes.
Claim 11
Dependent Claim
18 words
A semiconductor device package claimed in claim 2, wherein said conductor protecting layer is formed of epoxy resin.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-10-04 | 2003-04-05 | 2003-10-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-10-04 | 2007-04-05 | 2007-10-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-10-04 | 2011-04-05 | 2011-10-05 | $7700.00 | Window Closed / Lapsed |