Low consumption linear voltage regulator with high supply line rejection

Claim 2

A linear voltage regulator comprising: an input terminal adapted to recieve a supply voltage thereon; an output terminal adapted to deliver a regulated output voltage; a power transistor having a control terminal and having a main conduction path connected in a path between the input terminal and the output terminal; an output current sensor for sensing an output current flowing along the path between the input terminal and the output terminal; an operational amplifier having a differential input stage biased by a bias current, and having a first input terminal connected to a voltage reference, a second input terminal coupled to the output terminal, and an output terminal coupled to the control terminal of the power transistor; and a bias current generator cooperating with said output current sensor for generating the bias current of the differential stage to vary proportionally with a value of the output current flowing in the path between the input terminal and the output terminal.

Claim 3

A linear voltage regulator according to claim 1, wherein said output current sensor comprises a sensing resistor connected in series with the main conduction path of the power transistor.

Claim 4

A linear voltage regulator according to claim 2, wherein said bias current generator comprises a transconductance operational amplifier having first and second inputs connected to first and second terminals, respectively, of said sensing resistor to measure a difference potential thereacross, and having an output terminal delivering an output current which is proportional to the difference potential across said sensing resistor.

Claim 5

A linear voltage regulator according to claim 3, wherein the differential input stage of said operational amplifier is biased by output current from the transconductance amplifier.

Claim 6

A linear voltage regulator according to claim 1, wherein said power transistor is an N-channel MOS transistor.

Claim 7

A linear voltage regulator according to claim 1, further comprising a charge pump for supplying said operational amplifier a boosted voltage relative to the supply voltage.

Claim 8

A linear voltage regulator according to claim 1, further comprising a voltage divider coupled to the output terminal; and wherein a first input terminal of the operational amplifier is a non-inverting input terminal, and wherein a second input terminal is an inverting input terminal coupled to the output terminal through said voltage divider.

Claim 9

A linear voltage regulator comprising: an input terminal adapted to receive a supply voltage thereon; an output terminal adapted to deliver a regulated output voltage; a power transistor having a control terminal and having a main conduction path connected in a path between the input terminal and the output terminal; a sensing resistor connected in series with the main conduction path of the power transistor for sensing an output current flowing along the path between the input terminal and the output terminal; an operational amplifier having a differential input stage biased by a bias current, and having a first input terminal connected to a voltage reference, a second input terminal coupled to the output terminal, and an output terminal coupled to the control terminal of the power transistor; and a transconductance operational amplifier having first and second inputs connected to first and second terminals, respectively, of said sensing resistor to measure a difference potential thereacross, and having an output terminal delivering an output current to bias the differential input stage of said operational amplifier based upon the difference potential.

Claim 10

A linear voltage regulator comprising: an input terminal adapted to receive a supply voltage thereon; an output terminal adapted to deliver a regulated output voltage; a power transistor having a control terminal and having a main conduction path connected in a path between the input terminal and the output terminal; a sensing resistor connected in series with the main conduction path of the power transistor for sensing an output current flowing along the path between the input terminal and the output terminal; an operational amplifier having a differential input stage biased by a bias current, and having a first input terminal connected to a voltage reference, a second input terminal coupled to the output terminal, and an output terminal coupled to the control terminal of the power transistor; and a transconductance operational amplifier having first and second inputs connected to first and second terminals, respectively, of said sensing resistor to measure a difference potential thereacross, and having an output terminal delivering an output current to bias the differential input stage of said operational amplifier based upon the difference potential.

Claim 11

A linear voltage regulator according to claim 8, wherein said transconductance amplifier biases the differential input stage proportional to current flow between the input terminal and the output terminal.

Claim 12

A linear voltage regulator according to claim 8, wherein said power transistor is an N-channel MOS transistor.

Claim 13

A linear voltage regulator according to claim 8, further comprising a charge pump for supplying said operational amplifier a boosted voltage relative to the supply voltage.

Claim 14

A linear voltage regulator according to claim 8, further comprising a voltage divider coupled to the output terminal; and wherein a first input terminal of the operational amplifier is a non-inverting input terminal, and wherein a second input terminal is an inverting input terminal coupled to the output terminal through said voltage divider.

Claim 15

A linear voltage regulator comprising: a power transistor having a control terminal and defining a main conduction path; an operational amplifier having a differential input stage biased by a bias current, and having a first input terminal connected to a voltage reference, and an output terminal coupled to the control terminal of the power transistor; and a bias current generator for generating the bias current of the differential stage to vary proportionally with a value of the output current flowing in the main conduction path.

Claim 16

A linear voltage regulator comprising: a power transistor having a control terminal and defining a main conduction path; an operational amplifier having a differential input stage biased by a bias current, and having a first input terminal connected to a voltage reference, and an output terminal coupled to the control terminal of the power transistor; and a bias current generator for generating the bias current of the differential stage to vary proportionally with a value of the output current flowing in the main conduction path.

Claim 17

A linear voltage regulator according to claim 13, wherein said bias current generator comprises a sensing resistor connected in series with the main conduction path of the power transistor.

Claim 18

A linear voltage regulator according to claim 14, wherein said bias current generator comprises a transconductance operational amplifier having first and second inputs connected to first and second terminals, respectively, of said sensing resistor to measure a difference potential thereacross, and having an output terminal delivering an output current which is proportional to the difference potential across said sensing resistor.

Claim 19

A linear voltage regulator according to claim 15, wherein the differential input stage of said operational amplifier is biased by output current from the transconductance amplifier.

Claim 20

A linear voltage regulator according to claim 13, wherein said power transistor is an N-channel MOS transistor.

Claim 21

A linear voltage regulator according to claim 13, further comprising a charge pump for supplying said operational amplifier a boosted voltage relative to the supply voltage.

Claim 22

A linear voltage regulator according to claim 13, further comprising a voltage divider coupled to an inverting input terminal of said operational amplifier.

Claim 25

A method according to claim 20, wherein the step of generating the bias current comprises connecting a sensing resistor in series with the main conduction path of the power transistor.

Claim 26

A method according to claim 21, wherein the step of generating the bias current comprises connecting a transconductance operational amplifier having first and second inputs to first and second terminals, respectively, of the sensing resistor to measure a difference potential thereacross, and having an output terminal delivering an output current which is proportional to the difference potential across the sensing resistor.

Claim 27

A method according to claim 20, wherein the power transistor is an N-channel MOS transistor; and further comprising the step of supplying the operational amplifier a boosted voltage relative to the supply voltage.