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Method of forming a semiconductor device have a screen stacked cell capacitor

Assignee: Hitachi Ltd
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Filing: 1996-08-27
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Granted: 1999-08-03
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Expires: 2016-08-27
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Abstract

Abstract A semiconductor device, such as a dynamic RAM, and method of making it. A number of stacked cell capacitors are placed at a prescribed spacing in an alignment direction on top of a p - -type silicon substrate (1). Each capacitor has a nearly perpendicular cylindrical lower electrode (cylindrical polysilicon layer (96)), a dielectric film (silicon nitride film (77)), and upper electrode (plate electrode (78) made of polysilicon). The spacing in the alignment direction is smaller than the inner diameter of the lower electrode.

Inventors

  • 👤 Michio Nishimura
  • 👤 Kazuhiko Saitoh
  • 👤 Masayuki Yasuda
  • 👤 Takashi Hayakawa
  • 👤 Michio Tanaka
  • 👤 Yuji Ezaki
  • 👤 Katsuo Yuhara
  • 👤 Minoru Ohtsuka
  • 👤 Toshikazu Kumai
  • 👤 Songsu Cho
  • 👤 Toshiyuki Kaeriyama
  • 👤 Keizo Kawakita
  • 👤 Toshihiro Sekiguchi
  • 👤 Yoshitaka Tadaki
  • 👤 Jun Murata
  • 👤 Hideo Aoki
  • 👤 Akihiko Konno
  • 👤 Kiyomi Katsuyama
  • 👤 Takafumi Tokunaga
  • 👤 Yoshimi Torii

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 03:28
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/30; H10B12/31; H10B12/318; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0144

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 282 words
In a method of manufacturing a semiconductor by providing a semiconductor substrate and placing a number of stacked cell capacitors at a prescribed interval on a semiconductor substrate, each stacked cell capacitor having a cylindrical lower electrode, a dielectric film, and an upper electrode in the shape of an inverted frustum, the spacing in the alignment direction being smaller than the inner diameter of the lower electrode; the improvement comprising the steps of: forming spacer material for regulating the shape of the stacked cell capacitors on the semiconductor substrate; forming a plurality of first mask materials by positioning them at prescribed intervals and aligning them on the spacer material so the spacing in the alignment direction is less than the diameter and thickness of the mask materials; etching the spacer material is etched using the first mask materials to selectively remove the spacer material directly beneath the region of the spacing divide the spacer material into multiple units, the inner diameter of the lower electrode being determined by each spacer material; adhering structural material layer of the lower electrode to a surface of the spacer material; filling a second mask material between the separated plurality of spacer materials to a height less than the upper surface of the spacer material; etching the structural material layer that is exposed on the upper surface and the vicinity of the spacer material; removing the second mask material and leaving the structural material layer on the side surfaces of the spacer material; removing the spacer material and forming the lower electrode; forming the dielectric film on at least a surface of the lower electrode; and forming the upper electrode on a surface of the dielectric film.
Claim 2
Dependent Claim 282 words
In a method of manufacturing a semiconductor by providing a semiconductor substrate and placing a number of stacked cell capacitors at a prescribed interval on a semiconductor substrate, each stacked cell capacitor having a cylindrical lower electrode, a dielectric film, and an upper electrode in the shape of an inverted frustum, the spacing in the alignment direction being smaller than the inner diameter of the lower electrode; the improvement comprising the steps of: forming spacer material for regulating the shape of the stacked cell capacitors on the semiconductor substrate; forming a plurality of first mask materials by positioning them at prescribed intervals and aligning them on the spacer material so the spacing in the alignment direction is less than the diameter and thickness of the mask materials; etching the spacer material is etched using the first mask materials to selectively remove the spacer material directly beneath the region of the spacing divide the spacer material into multiple units, the inner diameter of the lower electrode being determined by each spacer material; adhering structural material layer of the lower electrode to a surface of the spacer material; filling a second mask material between the separated plurality of spacer materials to a height less than the upper surface of the spacer material; etching the structural material layer that is exposed on the upper surface and the vicinity of the spacer material; removing the second mask material and leaving the structural material layer on the side surfaces of the spacer material; removing the spacer material and forming the lower electrode; forming the dielectric film on at least a surface of the lower electrode; and forming the upper electrode on a surface of the dielectric film.
Claim 3
Dependent Claim 41 words
The method of claim 1 wherein the diameter of the unmasked region of the spacer material or the spacing of the first mask material is more than one time and less than ten times the thickness of this first mask material.
Claim 4
Dependent Claim 59 words
The method of claim 1 wherein the diameter of the unmasked region of the spacer material is more than one time and less than ten times the combined total thickness of the thickness of this first mask material and the thickness of the unmasked region or of the material to be etched directly beneath the region of the spacing.
Claim 5
Dependent Claim 28 words
The method of claim 1 wherein etching of the spacing material is an anisotropic dry gas etch of a mixture of CF 4 , CHF 3 and Ar.

References Cited (Backward Citations)

US5381365A Cited
US5434439A Cited
US5471418A Cited
US5712182A Cited
US5621606A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-08-02 2003-02-01 2003-08-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-08-02 2007-02-01 2007-08-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-08-02 2011-02-01 2011-08-03 $7700.00 Window Closed / Lapsed

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