Capacitor utilizing high dielectric constant material

Claim 2

In combination: a substrate of semiconductive material having respective first and second opposed surfaces; a first contact area on the second surface of said substrate of semiconductive material; a first electrode having respective first and second opposed surfaces, the first surface of said first electrode being located parallel to the second surface of said substrate of semiconductive material but spaced therefrom; an electrically insulating layer having first and second opposed surfaces with a first contact hole extending therebetween, having its said first surface adjoining the second surface of said substrate of semiconductive material so said first contact hole spans at least a portion of said contact area, having its said second surface adjoining the first surface of said first electrode so said first contact hole is covered by said first electrode, and having a trench in its said second surface, which trench has first and second sides, said first side of said trench being aligned with an edge of said first electrode; a first conductive plug extending through said first contact hole for making ohmic contact to said first contact area and to said first electrode; a second electrode adjoining the second surface of said electrically insulating layer, said second electrode having an edge adjacent to the second side of said trench; a dielectric film extending over said first electrode and the inside of the trench; and a third electrode extending over said dielectric film to form a first capacitor with said first electrode, said first and third electrodes providing the plates of said first capacitor, a portion of said third electrode extending into said trench as a shield against stray capacitance between said first electrode and said second electrode.

Claim 3

The combination of claim 1; wherein a second contact hole extends between the first and second surfaces of said electrically insulating layer, said second contact hole being located such that it is covered by said second electrode; and wherein said dielectric film also extends over said second electrode with said third electrode extending over the portion of said dielectric film that extends over said second electrode to form a second capacitor with said second electrode, said second and third electrodes providing the plates of said second capacitor; said combination further comprising: a second contact area on the second surface of said substrate of semiconductive material, located such that it spans said second contact hole; and a second conductive plug extending through said second contact hole for making ohmic contact to said second contact area and to said second electrode.

Claim 4

The combination of claim 2, wherein the depth of said trench on said second surface of said electrically insulating layer is greater than the thickness of said dielectric film.

Claim 5

The combination of claim 2, wherein said dielectric film has a thickness within the range of 200-500Å inclusive.

Claim 6

The combination of claim 2, wherein said dielectric film is of a material selected from a group consisting of PZT (PbZrTiO 3 ), BSTO (BaSrTiO 3 ), STO (SrTiO 3 ), BaTiO 3 , PbTiO 3 and Bi 4 Ti 3 O 12 .

Claim 7

The combination of claim 2, wherein said first and second conductive plugs are doped polycrystalline silicon, and wherein said first and second electrodes are doped polycrystalline silicon.

Claim 8

The combination of claim 6, wherein said third electrode is metal.

Claim 9

The combination of claim 2, wherein said first and second conductive plugs are doped polycrystalline silicon; wherein said first and second electrodes are metal; wherein a first barrier layer is interposed between said first conductive plug and said first electrode, to prevent migration of silicon into the first electrode and to prevent migration of metal into the first conductive plug; and wherein a second barrier layer is interposed between said second conductive plug and said second electrode, to prevent migration of silicon into the second electrode and to prevent migration of metal into the second conductive plug.

Claim 10

The combination of claim 8, wherein said third electrode is metal.

Claim 11

The combination of claim 1, wherein the depth of said trench on said second surface of said electrically insulating layer is greater than the thickness of said dielectric film.

Claim 12

The combination of claim 1, wherein said dielectric film has a thickness within the range of 200-500Å inclusive.

Claim 13

The combination of claim 1, wherein said first conductive plug is doped polycrystalline silicon; wherein said first and second electrodes are metal; and wherein a barrier layer is interposed between said first conductive plug and said first electrode, to prevent migration of silicon into the first electrode and to prevent migration of metal into the first conductive plug.

Claim 14

The combination of claim 12, wherein said third electrode is metal.

Claim 15

In combination: a substrate of semiconductive material having respective first and second opposed surfaces; a first contact area on the second surface of said substrate of semiconductive material; a first electrode having respective first and second opposed surfaces extending to a peripheral wall of said first electrode, the first surface of said first electrode being located parallel to the second surface of said substrate of semiconductive material but spaced therefrom; a first barrier layer on the first surface of said first electrode; a first spacer surrounding the peripheral wall of said first electrode, said first spacer composed of a first separating wall of a spacer material, said first separating wall having an inside against the peripheral wall of said first electrode and having an outside; an electrically insulating layer having first and second opposed surfaces with a first contact hole extending therebetween, having its said first surface adjoining the second surface of said substrate of semiconductive material so said first contact hole spans at least a portion of said contact area, having its said second surface adjoining the first surface of said first electrode so said first contact hole is covered by said first electrode, and having a trench in its said second surface, which trench has first and second sides, said first side of said trench being aligned with at least a portion of the outside of said first separating wall; a first conductive plug extending through said first contact hole for making ohmic contact to said first contact area and to said first electrode; a second electrode adjoining the second surface of said electrically insulating layer, said second electrode having a peripheral wall adjacent to the second side of said trench; a dielectric film extending over said first electrode as surrounded by said first spacer and further extending over the inside of the trench; and a third electrode extending over said dielectric film to form a first capacitor with said first electrode, said first and third electrodes providing the plates of said first capacitor, a portion of said third electrode extending into said trench as a shield against stray capacitance between said first electrode and said second electrode.

Claim 16

In combination: a substrate of semiconductive material having respective first and second opposed surfaces; a first contact area on the second surface of said substrate of semiconductive material; a first electrode having respective first and second opposed surfaces extending to a peripheral wall of said first electrode, the first surface of said first electrode being located parallel to the second surface of said substrate of semiconductive material but spaced therefrom; a first barrier layer on the first surface of said first electrode; a first spacer surrounding the peripheral wall of said first electrode, said first spacer composed of a first separating wall of a spacer material, said first separating wall having an inside against the peripheral wall of said first electrode and having an outside; an electrically insulating layer having first and second opposed surfaces with a first contact hole extending therebetween, having its said first surface adjoining the second surface of said substrate of semiconductive material so said first contact hole spans at least a portion of said contact area, having its said second surface adjoining the first surface of said first electrode so said first contact hole is covered by said first electrode, and having a trench in its said second surface, which trench has first and second sides, said first side of said trench being aligned with at least a portion of the outside of said first separating wall; a first conductive plug extending through said first contact hole for making ohmic contact to said first contact area and to said first electrode; a second electrode adjoining the second surface of said electrically insulating layer, said second electrode having a peripheral wall adjacent to the second side of said trench; a dielectric film extending over said first electrode as surrounded by said first spacer and further extending over the inside of the trench; and a third electrode extending over said dielectric film to form a first capacitor with said first electrode, said first and third electrodes providing the plates of said first capacitor, a portion of said third electrode extending into said trench as a shield against stray capacitance between said first electrode and said second electrode.

Claim 17

The combination of claim 14; wherein said second electrode has respective first and second opposed surfaces extending to a peripheral wall of said second electrode, with the first surface of said second electrode adjoining the second surface of said electrically insulative layer; and wherein a second contact hole extends between the first and second surfaces of said electrically insulating layer, said second contact hole being located such that it is covered by said second electrode; said combination further comprising: a second barrier layer on said second electrode; a second contact area on the second surface of said substrate of semiconductive material, located such that it spans said second contact hole; a second conductive plug extending through said second contact hole for making ohmic contact to said second contact area and to the first surface of said second electrode; and a second spacer surrounding the peripheral wall of said second electrode, said second spacer composed of a second separating wall of said spacer material, said second separating wall having an inside against the peripheral wall of said second electrode and having an outside, said dielectric film further extending over the second surface of said second electrode, said third electrode further extending over the portion of said dielectric film that extends over the second surface of said second electrode to form a second capacitor with said second electrode, said second and third electrodes providing the plates of said second capacitor.

Claim 18

The combination of claim 15, wherein said dielectric film is of a material selected from a group consisting of PZT (PbZrTiO 3 ), BSTO (BaSrTiO 3 ), SrTiO 3 , BaTiO 3 , PbTiO 3 and Bi 4 Ti 3 O 12 .

Claim 19

The combination of claim 16, wherein said first and second electrodes are metal, and wherein said first and second barrier layers are formed from a refractory metal.

Claim 20

The combination of claim 17, wherein said first and second electrodes are platinum.

Claim 21

A capacitor as claimed in claim 18, wherein said spacer material is selected from a group consisting of platinum and Si 3 N 4 .

Claim 22

The combination of claim 14, wherein said dielectric film is of a material selected from a group consisting of PZT (PbZrTiO 3 ), BSTO (BaSrTiO 3 ), SrTiO 3 , BaTiO 3 , PbTiO 3 and Bi 4 Ti 3 O 12 .

Claim 23

The combination of claim 20, wherein said first electrode is metal, and wherein said first barrier layer is formed from a refractory metal.

Claim 24

The combination of claim 21, wherein said first electrode is platinum.

Claim 25

A capacitor as claimed in claim 22, wherein said spacer material is selected from a group consisting of platinum and Si 3 N 4 .