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Method for fabricating a semiconductor device with improved device integration and field-region insulation

Assignee: SK Hynix Inc
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Filing: 1997-02-04
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Granted: 1999-06-22
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Expires: 2017-02-04
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Abstract

Abstract A method for the fabrication of a semiconductor device is characterized by a series of steps comprising successively forming a trench in a field region of monosilicon substrate and forming an oxidation-preventive layer and a silicon layer in the trench, and oxidizing the silicon layer into a field oxide film to produce a channel stop region beneath the trench in the substrate. The method alternatively comprises forming a trench having a small pattern in a field region of a monosilicon substrate, sequentially forming an oxidation-preventive layer and a silicon layer on the surface of the trench, and oxidizing the silicon layer and the substrate of a field region having a large pattern size, at the same time, to produce a field oxide film and channel stop diffusion regions below both the trench and the field oxide film having a large pattern. Such channel stop diffusion regions contribute to minimizing the redistribution of channel stop ions in the monosilicon substrate below both the trench and the field oxide film having a large pattern. In addition, the channel stop diffusion region restrains stress caused by oxidation of the monosilicon substrate and improves the insulation properties of the field region.

Inventors

  • 👤 Young Kwon Jun

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 20:58
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/014; H10W10/0142; H10W10/0148; H10W10/10; H10W10/13; H10W10/17

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 182 words
A method for fabricating a semiconductor device, comprising the steps of: forming a trench in a first field region of a semiconductor substrate with an ion-implanted layer in the semiconductor substrate underlying a bottom of said trench; forming an oxide film on surface of said trench; forming a first ion-implanted layer beneath said trench by implanting an impurity; removing said oxide film; forming an insulation film on said semiconductor substrate including said trench; forming an oxidation-preventive layer on said insulation film; forming a mask layer on said oxidation-preventive layer; removing a portion of said mask layer and said oxidation-preventive layer over a second field region of said semiconductor substrate; forming a second ion-implanted layer in said second field region; removing said mask layer; forming a silicon layer on said semiconductor substrate to fill said trench after removing said mask layer, said silicon layer having a recessed portion above said trench; and simultaneously oxidizing said silicon layer recessed portion in said trench and said second field region by a LOCOS method, whereby to form isolation regions in the first and second field regions.
Claim 2
Independent Claim 182 words
A method for fabricating a semiconductor device, comprising the steps of: forming a trench in a first field region of a semiconductor substrate with an ion-implanted layer in the semiconductor substrate underlying a bottom of said trench; forming an oxide film on surface of said trench; forming a first ion-implanted layer beneath said trench by implanting an impurity; removing said oxide film; forming an insulation film on said semiconductor substrate including said trench; forming an oxidation-preventive layer on said insulation film; forming a mask layer on said oxidation-preventive layer; removing a portion of said mask layer and said oxidation-preventive layer over a second field region of said semiconductor substrate; forming a second ion-implanted layer in said second field region; removing said mask layer; forming a silicon layer on said semiconductor substrate to fill said trench after removing said mask layer, said silicon layer having a recessed portion above said trench; and simultaneously oxidizing said silicon layer recessed portion in said trench and said second field region by a LOCOS method, whereby to form isolation regions in the first and second field regions.
Claim 3
Dependent Claim 33 words
A method in accordance with claim 1, wherein a width of the isolation region in the first field region is smaller than the width of the isolation region in the second field region.
Claim 4
Dependent Claim 15 words
A method in accordance with claim 1, wherein the oxidation-preventive layer includes a nitride layer.
Claim 5
Dependent Claim 14 words
A method in accordance with claim 1, wherein the silicon layer includes a polysilicon.
Claim 6
Dependent Claim 15 words
A method in accordance with claim 1, wherein the silicon layer includes an amorphous silicon.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-06-21 2002-12-21 2003-06-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-06-21 2006-12-21 2007-06-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-06-21 2010-12-21 2011-06-22 $7700.00 Window Closed / Lapsed

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