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JPS6038831A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device and manufacture thereof

Assignee: Hitachi Ltd
•
Filing: 1983-08-12
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Granted: —
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Expires: 2003-08-12
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Abstract

Abstract PURPOSE:To further upgrade a higher integration of the IC by a method wherein an isolation region in a grooved isolation structure, wherein no bird's beak is generated, is formed at a part, where high integration is needed, and a thick oxide film is formed at a wide region other than the isolation region in such a way as to interposed between the grooved isolation structures. CONSTITUTION:A silicon dioxide film 2 is formed on the surface of a P type silicon semiconductor substrate 1, and after a silicon nitriding film 3 was formed thereon, grooves 4 are formed and the surface is partitioned into numerous regions. In addition to an element forming region 5, a region 6, where no element is formed, is also included. After an embedding material 9 consisting of such an insulator as a silicon dioxide, etc., was deposited on the whole surface of the substrate 1, the surface of the substrate 1 is flattened. After an oxidation-resistant silicon nitriding film 10 was deposited on the whole surface, a part corresponding to the region 6, where no element is formed, is selectively removed and a thick oxide film 11 is formed on the surface. The silicon nitriding film 10 and the silicon dioxide film 2 are removed, the silicon surface of the surface 1 is made to expose and an etching is performed on a part of the embedding material 9, where is appearing upwards from the substrate 1. As a result, the substrate 1 is completely flattened.

Inventors

  • 👤 Kazuo Nojiri
  • 👤 野尻 一男
  • 👤 Katsuhiko Ito
  • 👤 勝彦 伊藤

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 03:51
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/014; H10W10/0148; H10W10/10; H10W10/13; H10W10/17

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