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US5903053A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Toshiba Corp
•
Filing: 1996-07-09
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Granted: 1999-05-11
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Expires: 2016-07-09
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Abstract

Abstract A semiconductor device comprising a conductive layer and an amorphous alloy layer formed on the bottom surface of said conductive layer and acting as a barrier layer. The conductive layer is either an electrode layer or a wiring layer. The amorphous alloy layer is made of a matrix phase and microcrystal grains. The matrix phase consists mainly of a Ti-Si-N amorphous alloy. The microcrystal grains are dispersed in the matrix phase, not continuously arranged in the direction of thickness of the amorphous alloy layer.

Inventors

  • 👤 Tadashi Iijima
  • 👤 Hisako Ono
  • 👤 Kyoichi Suguro
  • 👤 Yasushi Akasaka
  • 👤 Shinichi Nakamura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:07
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/667; H10D64/668; H10D30/00; H10D30/60; H10D30/601; H10D64/62; H10D64/661; H10D64/662; H10D64/663; H10D64/664; H10D64/665

Claims Analysis

Total Claims: 36
Claim 1
Independent Claim 76 words
A semiconductor device comprising: a conductive layer being at least either one of an electrode layer and a wiring layer, and; an amorphous alloy layer formed on a bottom surface of said conductive layer and made of a matrix phase and microcrystal grains, said matrix phase containing amorphous alloy as a main component, and said microcrystal grains being dispersed in the matrix phase, not continuously arranged in the direction of thickness of the amorphous alloy layer.
Claim 2
Dependent Claim 76 words
A semiconductor device comprising: a conductive layer being at least either one of an electrode layer and a wiring layer, and; an amorphous alloy layer formed on a bottom surface of said conductive layer and made of a matrix phase and microcrystal grains, said matrix phase containing amorphous alloy as a main component, and said microcrystal grains being dispersed in the matrix phase, not continuously arranged in the direction of thickness of the amorphous alloy layer.
Claim 3
Dependent Claim 54 words
The device according to claim 1, wherein said amorphous alloy layer contains nitrogen, a refractory metal selected from the group consisting of Ti, Zr, Hf, V, Nb, Ta, Cr, W and Mo, and a semiconductor selected from the group consisting of a group IV material, a binary compound semiconductor, and a ternary compound semiconductor.
Claim 4
Dependent Claim 66 words
The device according to claim 2, wherein said group IV material is selected from the group consisting of Si, Ge and C, said binary compound semiconductor is selected from the group consisting of GaAs, InP, InSb, BN, GaP, ZnSe, ZnS, CdS and CdTe, and said ternary compound semiconductor is selected from the group consisting of II-IV-VI compound, II-IV-V compound, III-IV-VI compound, I-III-VI compound and II-V-VII compound.
Claim 5
Dependent Claim 11 words
The device according to claim 2, wherein said semiconductor is Si.
Claim 6
Dependent Claim 12 words
The device according to claim 4, wherein said refractory metal is Ti.
Claim 7
Dependent Claim 13 words
The device according to claim 5, wherein said microcrystal grains are TiN grains.
Claim 8
Dependent Claim 56 words
The device according to claim 1, wherein said conductive layer is one selected from the group consisting of a Cu layer, an Al layer, an Ag layer, an Au layer, a layer of alloy of at least two of these metals, and a layer consisting of at least two films made of any of these metals.
Claim 9
Dependent Claim 29 words
The device according to claim 1, wherein said amorphous alloy layer and said conductive layer constitute a buried wiring layer formed in a groove made in an insulating layer.
Claim 10
Dependent Claim 31 words
The device according to claim 1, wherein said amorphous alloy layer is provided not only on the bottom surface of said conductive layer, but also on sides of said conductive layer.
Claim 11
Dependent Claim 24 words
The device according to claim 1, wherein said amorphous alloy layer and said conductive layer constitute a wiring layer formed on an insulating layer.
Claim 12
Dependent Claim 30 words
The device according to claim 1, wherein said amorphous alloy layer is provided not only on the bottom surface of said conductive layer, but also on the upper surface thereof.
Claim 13
Dependent Claim 31 words
The device according to claim 1, wherein said amorphous alloy layer is provided not only on the bottom of said conductive layer, but also on the sides and upper surface thereof.
Claim 14
Dependent Claim 21 words
The device according to claim 1, wherein said amorphous alloy layer functions as a barrier metal layer and a bonding layer.
Claim 15
Dependent Claim 40 words
A semiconductor device comprising: a conductive layer being at least either one of an electrode layer and a wiring layer, and; a barrier metal layer formed on a bottom surface of said conductive layer and containing Ti, Si and N.
Claim 16
Dependent Claim 40 words
A semiconductor device comprising: a conductive layer being at least either one of an electrode layer and a wiring layer, and; a barrier metal layer formed on a bottom surface of said conductive layer and containing Ti, Si and N.
Claim 17
Dependent Claim 32 words
The device according to claim 14, wherein Si contained in said barrier metal layer has an atomic ratio of 1 or more with respect to Ti contained in said barrier metal layer.
Claim 18
Dependent Claim 56 words
The device according to claim 14, wherein said conductive layer is one selected from the group consisting of a Cu layer, an Al layer, an Ag layer, an Au layer, a layer of alloy of at least two of these metals, and a layer consisting of at least two films made of any of these metals.
Claim 19
Dependent Claim 55 words
A semiconductor device, comprising: an insulating layer having a groove; a conductive layer selected from the group consisting of an electrode layer and a wiring layer, said conductive layer being buried in said groove; and a barrier metal layer formed on bottom and side surfaces of said conductive layer and containing Ti, Si and N.
Claim 20
Dependent Claim 55 words
A semiconductor device, comprising: an insulating layer having a groove; a conductive layer selected from the group consisting of an electrode layer and a wiring layer, said conductive layer being buried in said groove; and a barrier metal layer formed on bottom and side surfaces of said conductive layer and containing Ti, Si and N.
Claim 21
Dependent Claim 18 words
The device according to claim 17, wherein the atomic ratio of Si to Ti is 0.7 or more.
Claim 22
Dependent Claim 18 words
The device according to claim 17, wherein the atomic ratio of Si to Ti is 1 or more.
Claim 23
Dependent Claim 35 words
A semiconductor device comprising a first conductive layer; a barrier metal layer formed on said first conductive layer and containing Ti, Si, and N; and a second conductive layer formed on said barrier metal layer.
Claim 24
Dependent Claim 35 words
A semiconductor device comprising a first conductive layer; a barrier metal layer formed on said first conductive layer and containing Ti, Si, and N; and a second conductive layer formed on said barrier metal layer.
Claim 25
Dependent Claim 77 words
A semiconductor device comprising: a first conductive layer; a barrier metal layer formed on said first conductive layer and formed of an amorphous alloy layer made of a matrix phase and microcrystal grains, said matrix phase containing amorphous alloy as a main component, and said microcrystal grains being dispersed in the matrix phase, not continuously arranged in the direction of thickness of the amorphous alloy layer; and a second conductive layer formed on said barrier metal layer.
Claim 26
Dependent Claim 77 words
A semiconductor device comprising: a first conductive layer; a barrier metal layer formed on said first conductive layer and formed of an amorphous alloy layer made of a matrix phase and microcrystal grains, said matrix phase containing amorphous alloy as a main component, and said microcrystal grains being dispersed in the matrix phase, not continuously arranged in the direction of thickness of the amorphous alloy layer; and a second conductive layer formed on said barrier metal layer.
Claim 27
Dependent Claim 72 words
A semiconductor device, comprising: a first conductive layer; an insulating layer formed on said first conductive layer and having a contact hole exposing an upper surface of said first conductive layer; a barrier metal layer formed on said insulating layer, a side surface of said contact hole and upper surface of said first conductive layer, and containing Ti, Si and N; and a second conductive layer formed on said barrier metal layer.
Claim 28
Dependent Claim 72 words
A semiconductor device, comprising: a first conductive layer; an insulating layer formed on said first conductive layer and having a contact hole exposing an upper surface of said first conductive layer; a barrier metal layer formed on said insulating layer, a side surface of said contact hole and upper surface of said first conductive layer, and containing Ti, Si and N; and a second conductive layer formed on said barrier metal layer.
Claim 29
Dependent Claim 114 words
A semiconductor device, comprising: a first conductive layer; an insulating layer formed on said first conductive layer and having a contact hole exposing an upper surface of said first conductive layer; a barrier metal layer formed on said insulating layer, a side surface of said contact hole and upper surface of said first conductive layer, and formed of an amorphous alloy layer made of a matrix phase and microcrystal grains, said matrix phase containing amorphous alloy as a main component, and said microcrystal grains being dispersed in the matrix phase, not continuously arranged in the direction of thickness of the amorphous alloy layer; and a second conductive layer formed on said barrier metal layer.
Claim 30
Dependent Claim 114 words
A semiconductor device, comprising: a first conductive layer; an insulating layer formed on said first conductive layer and having a contact hole exposing an upper surface of said first conductive layer; a barrier metal layer formed on said insulating layer, a side surface of said contact hole and upper surface of said first conductive layer, and formed of an amorphous alloy layer made of a matrix phase and microcrystal grains, said matrix phase containing amorphous alloy as a main component, and said microcrystal grains being dispersed in the matrix phase, not continuously arranged in the direction of thickness of the amorphous alloy layer; and a second conductive layer formed on said barrier metal layer.
Claim 31
Dependent Claim 17 words
The device according to claim 14, wherein said barrier metal layer consists of Ti, Si and N.
Claim 32
Dependent Claim 17 words
The device according to claim 17, wherein said barrier metal layer consists of Ti, Si and N.
Claim 33
Dependent Claim 17 words
The device according to claim 20, wherein said barrier metal layer consists of Ti, Si and N.
Claim 34
Dependent Claim 17 words
The device according to claim 21, wherein said barrier metal layer consists of Ti, Si and N.
Claim 35
Dependent Claim 17 words
The device according to claim 22, wherein said barrier metal layer consists of Ti, Si and N.
Claim 36
Dependent Claim 17 words
The device according to claim 23, wherein said barrier metal layer consists of Ti, Si and N.

References Cited (Backward Citations)

JPS58166770A Cited
JPS62203370A Cited
US5516579A Cited
US5641985A Cited
US5525837A Cited
US5607722A Cited
US5659057A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-05-10 2002-11-09 2003-05-11 $2000.00 Window Closed / Lapsed
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