US5895273A
Expired / Lapsed
US
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Silicon sidewall etching
Assignee: International Business Machines Corp
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Filing: 1997-06-27
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Granted: 1999-04-20
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Expires: 2017-06-27
Abstract
Abstract Decoupled plasma etching process used to make a protruding structure having vertical or near vertical sidewalls. The decoupled plasma etching process comprises the following steps: forming a mask on top of a semiconductor substrate defining the lateral size of the protruding structures to be formed in said substrate, feeding HCl, Cl 2 and N 2 into a plasma chamber to provide an ion plasma when applying source power, causing said ions to diffuse towards the substrate by applying a bias power such that the portions of said substrate not being covered by said mask are etched away, wherein the dosage of HCl, Cl 2 and N 2 is chosen such that newly formed portions of the sidewall surfaces are passivated by by-product of Si, Cl, and N 2 and thus become protected from further being etched. The bias power is less than 70 Watts to ensure that the etching process is predominantly chemical.
Inventors
- 👤 Stuart M. Burns
- 👤 Hussein I. Hanafi
- 👤 Waldemar W. Kocon
- 👤 Jeffrey J. Welser
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:21
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/24; H10P50/242
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
171 words
Method for the formation of a protruding silicon structure having vertical or near vertical sidewalls, said method being carried out in a decoupled plasma etching tool and comprising the following steps: forming a mask on top of a silicon substrate defining the lateral size of the protruding silicon structure, creating an ion plasma from hydrochloric acid (HCl), Chlorine (Cl 2 ), and Nitrogen (N 2 ) in said tool by applying source power, and causing said ions to diffuse towards the silicon substrate by applying a bias power such that the portions of said silicon substrate not being covered by said mask are etched away, wherein the dosage of hydrochloric gas (HCl), Chlorine (Cl 2 ), and Nitrogen (N 2 ) is chosen such that newly formed portions of the sidewall surfaces become passivated and protected from further being etched by by-product of the etch reactants Si, Cl, and N 2 , and wherein said bias power is less than 70 Watts to ensure that the etching process is predominantly chemical.
Claim 2
Dependent Claim
171 words
Method for the formation of a protruding silicon structure having vertical or near vertical sidewalls, said method being carried out in a decoupled plasma etching tool and comprising the following steps: forming a mask on top of a silicon substrate defining the lateral size of the protruding silicon structure, creating an ion plasma from hydrochloric acid (HCl), Chlorine (Cl 2 ), and Nitrogen (N 2 ) in said tool by applying source power, and causing said ions to diffuse towards the silicon substrate by applying a bias power such that the portions of said silicon substrate not being covered by said mask are etched away, wherein the dosage of hydrochloric gas (HCl), Chlorine (Cl 2 ), and Nitrogen (N 2 ) is chosen such that newly formed portions of the sidewall surfaces become passivated and protected from further being etched by by-product of the etch reactants Si, Cl, and N 2 , and wherein said bias power is less than 70 Watts to ensure that the etching process is predominantly chemical.
Claim 3
Dependent Claim
17 words
The method according to claim 1, wherein the total gas flow comprises between 90-98% hydrochloric gas (HCl).
Claim 4
Dependent Claim
32 words
The method according to claim 1, wherein the total gas flow is comprised of about 93% hydrochloric gas (HCl), about 5% Chlorine (Cl 2 ), and about 2% Nitrogen (N 2 ).
Claim 5
Dependent Claim
32 words
The method according to claim 1, wherein the total gas flow is comprised of about 96% hydrochloric gas (HCl), about 2% Chlorine (Cl 2 ), and about 2% Nitrogen (N 2 ).
Claim 6
Dependent Claim
24 words
The method according to claim 1, wherein the source power is in the range of 40-100 Watts, and preferably between 60 and 90 Watts.
Claim 7
Dependent Claim
24 words
The method according to claim 1, wherein the bias power is in the range of 5-70 Watts, and preferably between 20 and 40 Watts.
Claim 8
Dependent Claim
28 words
The method according to claim 1, wherein the pressure in the tool is kept at about 10 mTorr or below, and preferably between 5 mTorr and 8 mTorr.
Claim 9
Dependent Claim
20 words
The method according to claim 1, wherein the Nitrogen (N 2 ) is fed into the tool with a delay.
Claim 10
Dependent Claim
18 words
The method according to claim 1, wherein the ion plasma is stabilized before the bias voltage is applied.
Claim 11
Dependent Claim
28 words
The method according to claim 1, wherein the the silicon substrate is maintained at a temperature between 20 and 80° C., and preferably between 25 and 40° C.
Claim 12
Dependent Claim
13 words
The method according to claim 1, wherein the mask is a hard mask.
Claim 13
Dependent Claim
21 words
The method according to claim 11, wherein the hard mask comprises an oxide layer being between 0.005 and 0.03 μm thick.
Claim 14
Dependent Claim
25 words
The method according to claim 12, wherein the hard mask further comprises a Si 3 N 4 layer being between 0.08 and 0.2 μm thick.
Claim 15
Dependent Claim
28 words
The method according to claim 1, wherein the aspect ratio (height of sidewall vs. width of protruding silicon structure) is at least 1, and preferably at least 1.2.
Claim 16
Dependent Claim
14 words
The method according to claim 1, wherein the protruding silicon structure is a pillar.
Claim 17
Dependent Claim
17 words
The method according to claim 15, wherein the pillar is part of a vertical field effect transistor.
Claim 18
Dependent Claim
173 words
Method for making a vertical field effect transistor comprising a silicon pillar having vertical or near vertical sidewalls, said method being carried out in a decoupled plasma etching tool and comprising the following steps: forming a mask on top of a silicon substrate defining the lateral size of the silicon pillar, creating an ion plasma from hydrochloric acid (HCl), Chlorine (Cl 2 ), and Nitrogen (N 2 ) in said tool by applying source power, and causing said ions to diffuse towards the silicon substrate by applying a bias power such that the portions of said silicon substrate not being covered by said mask are etched away, wherein the dosage of hydrochloric gas (HCl), Chlorine (Cl 2 ), and Nitrogen (N 2 ) is chosen such that newly formed portions of the sidewall surfaces become passivated and protected from further being etched by by-product of the etch reactants Si, Cl, and N 2 , and wherein said bias power is less than 70 Watts to ensure that the etching process is predominantly chemical.
Claim 19
Dependent Claim
173 words
Method for making a vertical field effect transistor comprising a silicon pillar having vertical or near vertical sidewalls, said method being carried out in a decoupled plasma etching tool and comprising the following steps: forming a mask on top of a silicon substrate defining the lateral size of the silicon pillar, creating an ion plasma from hydrochloric acid (HCl), Chlorine (Cl 2 ), and Nitrogen (N 2 ) in said tool by applying source power, and causing said ions to diffuse towards the silicon substrate by applying a bias power such that the portions of said silicon substrate not being covered by said mask are etched away, wherein the dosage of hydrochloric gas (HCl), Chlorine (Cl 2 ), and Nitrogen (N 2 ) is chosen such that newly formed portions of the sidewall surfaces become passivated and protected from further being etched by by-product of the etch reactants Si, Cl, and N 2 , and wherein said bias power is less than 70 Watts to ensure that the etching process is predominantly chemical.
Claim 20
Dependent Claim
20 words
The method according to claim 17, wherein the vertical field effect transistor is part of a memory or storage cell.
Claim 21
Dependent Claim
17 words
The method according to claim 17, wherein the vertical field effect transistor is part of an EEPROM.
Claim 22
Dependent Claim
19 words
The method according to claim 17, wherein the vertical field effect transistor is part of a DRAM memory cell.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-04-19 | 2002-10-19 | 2003-04-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-04-19 | 2006-10-19 | 2007-04-20 | $3760.00 | Window Closed / Lapsed |
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