Process for preferentially etching polycrystalline silicon

Claim 2

A process for etching polycrystalline silicon in preference to and in the presence of exposed monocrystalline silicon comprising the steps of: providing a monocrystalline silicon substrate; providing a patterned layer of polycrystalline silicon overlying said substrate and exposing a portion of said substrate; anisotropically etching said patterned layer of polycrystalline silicon in a plasma comprising a noncarbonaceous compound of chlorine and oxygen as reactants; controlling the composition of said reactants so that the surface of said monocrystalline silicon substrate is not substantially etched.

Claim 3

The process of claim 1 wherein said compound comprises Cl 2 , ClF 3 or HCl.

Claim 4

The process of claim 1 wherein said plasma further comprises HBr or HI as reactants.

Claim 5

The process of claim 1 wherein said plasma comprises Cl 2 , HBr, O 2 and He as reactants.

Claim 6

The process of claim 1 wherein said oxygen comprises about 0.4 to about 1.5 percent by volume of said reactants.

Claim 7

A process for fabricating a semiconductor device which comprises the steps of: providing a monocrystalline silicon substrate having a major surface; providing a first layer of insulating material overlying said major surface; depositing a second layer of polycrystalline silicon overlying said first layer; patterning said second layer and said first layer to expose a portion of said surface of said monocrystalline silicon substrate; anisotropically etching said patterned layer of polycrystalline silicon in a plasma comprising a noncarbonaceous etchant for silicon and oxygen as reactants; controlling the composition of said reactants so that the surface of said monocrystalline silicon substrate is not substantially etched.

Claim 8

A process for fabricating a semiconductor device which comprises the steps of: providing a monocrystalline silicon substrate having a major surface; providing a first layer of insulating material overlying said major surface; depositing a second layer of polycrystalline silicon overlying said first layer; patterning said second layer and said first layer to expose a portion of said surface of said monocrystalline silicon substrate; anisotropically etching said patterned layer of polycrystalline silicon in a plasma comprising a noncarbonaceous etchant for silicon and oxygen as reactants; controlling the composition of said reactants so that the surface of said monocrystalline silicon substrate is not substantially etched.

Claim 9

The process of claim 6 wherein said noncarbonaceous silicon etchant comprises a compound selected from the group consisting of Cl 2 , SF 6 , NF 3 , ClF 3 , HCl, and combinations thereof.

Claim 10

The process of claim 7 wherein said noncarbonaceous silicon etchant comprises SF 6 .

Claim 11

The process of claim 6 wherein said reactants further comprises HBr.

Claim 12

The process of claim 6 wherein said oxygen comprises about 0.4 to about 1.5 percent by volume of said reactants.

Claim 13

A process for fabricating a semiconductor device which comprises the steps of: providing a monocrystalline silicon substrate; forming a gate insulator overlying said substrate; depositing a first layer of polycrystalline silicon overlying said gate insulator; forming an interlayer dielectric overlying said first layer; patterning said interlayer dielectric and said first layer of polycrystalline silicon; depositing a second layer of polycrystalline silicon overlying said patterned interlayer dielectric and first layer of polycrystalline silicon; patterning said second layer of polycrystalline silicon, said interlayer dielectric, and a portion of said gate insulator to thereby expose a portion of said monocrystalline silicon substrate; anisotropically etching said first layer of polycrystalline silicon in self alignment with said second layer of polycrystalline silicon, said etching comprising subjecting said second layer of polycrystalline silicon to a plasma including a noncarbonaceous etchant for silicon and oygen; controlling the composition of said plasma so that the surface of said monocrystalline silicon substrate is not substantially etched.

Claim 14

A process for fabricating a semiconductor device which comprises the steps of: providing a monocrystalline silicon substrate; forming a gate insulator overlying said substrate; depositing a first layer of polycrystalline silicon overlying said gate insulator; forming an interlayer dielectric overlying said first layer; patterning said interlayer dielectric and said first layer of polycrystalline silicon; depositing a second layer of polycrystalline silicon overlying said patterned interlayer dielectric and first layer of polycrystalline silicon; patterning said second layer of polycrystalline silicon, said interlayer dielectric, and a portion of said gate insulator to thereby expose a portion of said monocrystalline silicon substrate; anisotropically etching said first layer of polycrystalline silicon in self alignment with said second layer of polycrystalline silicon, said etching comprising subjecting said second layer of polycrystalline silicon to a plasma including a noncarbonaceous etchant for silicon and oygen; controlling the composition of said plasma so that the surface of said monocrystalline silicon substrate is not substantially etched.

Claim 15

The process of claim 11 wherein said noncarbonaceous silicon etchant is selected from the group consisting of CL 2 , HCl, SF 6 , NF 3 , ClF 3 , and combinations thereof.

Claim 16

The process of claim 11 wherein said plasma includes reactants Cl 2 , HBr, He, and O 2 .

Claim 17

The process of claim 13 wherein said O 2 is present in an amount equal to about 0.4-1.5 percent by volume of said reactants.