Patent US5889291A successfully refreshed from Google Patents.
US5889291A
Expired / Lapsed
US
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Semiconductor integrated circuit
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1996-07-31
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Granted: 1999-03-30
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Expires: 2016-07-31
Abstract
Abstract In a monolithic active matrix circuit that uses offset-gate TFTs in which the gate electrode is offset from the source and drain regions or TFTs whose gate insulating film is formed by vapor deposition, not only an active matrix circuit but also a drive circuit therefor is formed by using P-channel TFTs.
Inventors
- 👤 Jun Koyama
- 👤 Yuji Kawasaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 00:32
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; H; H10; H10D; H10D86/00; H10D86/40; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6729; H10D30/6737; H10D30/6739; H10D86/60
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
148 words
A semiconductor integrated circuit comprising: an insulating substrate; an active matrix circuit formed on said substrate, said active matrix circuit including first thin-film transistors; a drive circuit formed on said substrate for driving said active matrix circuit, said drive circuit including second thin-film transistors; a counter substrate opposed to said insulating substrate with a liquid crystal interposed therebetween, wherein said counter substrate covers said active matrix circuit and said drive circuit while a portion of the insulating substrate extends beyond at least one side edge of the counter substrate: at least one semiconductor chip on the portion of said insulating substrate extending beyond said side edge of the counter substrate, and operatively connected to said drive circuit; wherein all of said first thin film transistors are of p-channel type, and wherein each of said first thin film transistors comprises a gate electrode coated with an anodic oxide film.
Claim 2
Dependent Claim
148 words
A semiconductor integrated circuit comprising: an insulating substrate; an active matrix circuit formed on said substrate, said active matrix circuit including first thin-film transistors; a drive circuit formed on said substrate for driving said active matrix circuit, said drive circuit including second thin-film transistors; a counter substrate opposed to said insulating substrate with a liquid crystal interposed therebetween, wherein said counter substrate covers said active matrix circuit and said drive circuit while a portion of the insulating substrate extends beyond at least one side edge of the counter substrate: at least one semiconductor chip on the portion of said insulating substrate extending beyond said side edge of the counter substrate, and operatively connected to said drive circuit; wherein all of said first thin film transistors are of p-channel type, and wherein each of said first thin film transistors comprises a gate electrode coated with an anodic oxide film.
Claim 3
Dependent Claim
24 words
The circuit of claim 1 wherein said first transistors are of an offset-gate type that a gate electrode is apart from a drain region.
Claim 4
Dependent Claim
16 words
The circuit of claim 1 wherein said first thin film transistors are crystalline thin film transistors.
Claim 5
Dependent Claim
37 words
The circuit of claim 1 wherein all of said second transistors are of p-channel type in order to prevent variation of threshold voltages of said second transistors, said variation being originated from electrons trapped in said transistors.
Claim 6
Dependent Claim
27 words
The circuit of claim 4 wherein at least one of said second transistors is of an offset-gate type that a gate electrode is apart from a drain.
Claim 7
Dependent Claim
17 words
The circuit of claim 5 wherein said one of said second transistors is an analog buffer circuit.
Claim 8
Dependent Claim
43 words
The circuit of claim 1 wherein all of said first thin film transistors are of p-channel type in order to prevent variation of threshold voltages of said first transistors, said variation being originated from electrons trapped in gate insulating films of said transistors.
Claim 9
Dependent Claim
20 words
The circuit of claim 7 wherein said gate insulating films are formed at a temperature not higher than 800° C.
Claim 10
Dependent Claim
133 words
A semiconductor integrated circuit comprising: an insulating substrate; an active matrix circuit formed on said insulating substrate, said active matrix circuit including first crystalline thin-film transistors; a drive circuit formed on said insulating substrate for driving said active matrix circuit, said drive circuit including second thin-film transistors; a counter substrate opposed to said insulating substrate with a liquid crystal interposed therebetween, wherein said counter substrate covers said active matrix circuit and said drive circuit while a portion of the insulating substrate extends beyond at least one side edge of the counter substrate; at least one semiconductor chip on the portion of said insulating substrate extending beyond said side edge of the counter substrate, and operatively connected to said drive circuit; wherein all of said first crystalline thin film transistors are of p-channel type.
Claim 11
Dependent Claim
133 words
A semiconductor integrated circuit comprising: an insulating substrate; an active matrix circuit formed on said insulating substrate, said active matrix circuit including first crystalline thin-film transistors; a drive circuit formed on said insulating substrate for driving said active matrix circuit, said drive circuit including second thin-film transistors; a counter substrate opposed to said insulating substrate with a liquid crystal interposed therebetween, wherein said counter substrate covers said active matrix circuit and said drive circuit while a portion of the insulating substrate extends beyond at least one side edge of the counter substrate; at least one semiconductor chip on the portion of said insulating substrate extending beyond said side edge of the counter substrate, and operatively connected to said drive circuit; wherein all of said first crystalline thin film transistors are of p-channel type.
Claim 12
Dependent Claim
24 words
The circuit of claim 9 wherein said each of said first thin film transistors comprise a gate electrode coated with an anodic oxide film.
Claim 13
Dependent Claim
29 words
The circuit of claim 9 wherein said each of said first thin film transistors are of an offset-gate type that a gate electrode is apart from a drain region.
Claim 14
Dependent Claim
136 words
A semiconductor integrated circuit comprising: an insulating substrate; an active matrix circuit formed on said insulating substrate, said active matrix circuit including first thin-film transistors; a drive circuit formed on said insulating substrate for driving said active matrix circuit, said drive circuit including an analog buffer circuit comprising second thin-film transistors; a counter substrate opposed to said insulating substrate with a liquid crystal interposed therebetween wherein said counter substrate covers said active matrix circuit and said drive circuit while a portion of the insulating substrate extends beyond at least one side edge of the counter substrate; at least one semiconductor chip on the portion of said insulating substrate extending beyond said side edge of the counter substrate, and operatively connected to said drive circuit, wherein all of said first thin film transistors are of p-channel type.
Claim 15
Dependent Claim
136 words
A semiconductor integrated circuit comprising: an insulating substrate; an active matrix circuit formed on said insulating substrate, said active matrix circuit including first thin-film transistors; a drive circuit formed on said insulating substrate for driving said active matrix circuit, said drive circuit including an analog buffer circuit comprising second thin-film transistors; a counter substrate opposed to said insulating substrate with a liquid crystal interposed therebetween wherein said counter substrate covers said active matrix circuit and said drive circuit while a portion of the insulating substrate extends beyond at least one side edge of the counter substrate; at least one semiconductor chip on the portion of said insulating substrate extending beyond said side edge of the counter substrate, and operatively connected to said drive circuit, wherein all of said first thin film transistors are of p-channel type.
Claim 16
Dependent Claim
14 words
The semiconductor integrated circuit of claim 12 wherein said semiconductor chip comprises CMOS devices.
Claim 17
Dependent Claim
18 words
The semiconductor integrated circuit of claim 12 wherein said first thin film transistors are of an offset-gate type.
Claim 18
Dependent Claim
20 words
The semiconductor integrated circuit of claim 11 wherein said semiconductor chip is mounted over wiring lines on said insulating substrate.
Claim 19
Dependent Claim
20 words
The semiconductor integrated circuit of claim 9 wherein said semiconductor chip is mounted over wiring lines on said insulating substrate.
Claim 20
Dependent Claim
20 words
The semiconductor integrated circuit of claim 12 wherein said semiconductor chip is mounted over wiring lines on said insulating substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-29 | 2002-09-28 | 2003-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-29 | 2006-09-28 | 2007-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-29 | 2010-09-28 | 2011-03-30 | $7700.00 | Window Closed / Lapsed |