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US5885894A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of planarizing an inter-layer dielectric layer

Assignee: United Microelectronics Corp
•
Filing: 1997-06-25
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Granted: 1999-03-23
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Expires: 2017-06-25
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Abstract

Abstract A method of planarizing an inter-layer dielectric layer includes using a high density plasma chemical vapor deposition method to deposit an undoped dielectric, which increases the polishing efficiency in a subsequent chemical-mechanical polishing operation, and eliminates the need for a high temperature densifying treatment for planarization. A chemical-mechanical polishing operation is used to planarize the inter-layer dielectric.

Inventors

  • 👤 Jiunh-Yuan Wu
  • 👤 Water Lur
  • 👤 Shih-Wei Sun

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 13:11
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215; C; C23; C23C; C23C16/00; C23C16/22; C23C16/30; C23C16/40; C23C16/401; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6336; H10P14/66; H10P14/662; H10P14/6922; H10P14/6923; H10P95/00; H10P95/06; H10P95/062

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 106 words
A method of planarizing an inter-layer dielectric layer, including: providing a semiconductor substrate having a gate and a source/drain region formed thereabove; depositing an undoped silicate glass layer directly on the semiconductor substrate and over the gate and source/drain region using high density plasma chemical vapor deposition, so that the undoped silicate glass layer has a thickness over the source/drain region that is greater than a thickness of the gate, thereby forming only minor protrusions over the gate; planarizing the undoped silicate glass layer using chemical-mechanical polishing to remove the minor protrusions; and depositing a doped silicate glass layer directly on the undoped silicate glass layer.
Claim 2
Independent Claim 106 words
A method of planarizing an inter-layer dielectric layer, including: providing a semiconductor substrate having a gate and a source/drain region formed thereabove; depositing an undoped silicate glass layer directly on the semiconductor substrate and over the gate and source/drain region using high density plasma chemical vapor deposition, so that the undoped silicate glass layer has a thickness over the source/drain region that is greater than a thickness of the gate, thereby forming only minor protrusions over the gate; planarizing the undoped silicate glass layer using chemical-mechanical polishing to remove the minor protrusions; and depositing a doped silicate glass layer directly on the undoped silicate glass layer.
Claim 3
Dependent Claim 36 words
The method according to claim 1, wherein said depositing an undoped silicate glass layer includes depositing the undoped silicate glass layer to a thickness which is about 1000 Å greater than the thickness of the gate.
Claim 4
Dependent Claim 35 words
The method according to claim 1, wherein said depositing an undoped silicate glass layer includes performing the high density plasma chemical vapor deposition at an operating temperature between about 350° C. to about 450° C.
Claim 5
Dependent Claim 21 words
The method according to claim 1, wherein said planarizing the undoped silicate glass layer includes polishing for one minute or less.
Claim 6
Dependent Claim 27 words
The method according to claim 1, wherein said depositing a doped silicate glass layer includes forming the doped silicate glass layer using plasma enhanced chemical vapor deposition.
Claim 7
Dependent Claim 24 words
The method according to claim 1, wherein said depositing a doped silicate glass layer includes forming the doped silicate glass of a phosphosilicate glass.
Claim 8
Dependent Claim 23 words
The method according to claim 1, wherein said depositing a doped silicate glass layer includes forming the doped silicate glass of borophosphosilicate glass.
Claim 9
Independent Claim 118 words
A method of planarizing an inter-layer dielectric layer, including: forming a field effect transistor above a semiconductor substrate; depositing a metallic layer above the field effect transistor; depositing an undoped silicate glass layer directly on the semiconductor substrate and over the metallic layer using high density plasma chemical vapor deposition, so that the undoped silicate glass layer has a thickness over the semiconductor substrate in regions adjacent to the metallic layer that is greater than a thickness of the metallic layer, thereby forming only minor protrusions over the metallic layer; planarizing the undoped silicate glass layer using chemical-mechanical polishing to remove the minor protrusions; and depositing a doped silicate glass layer directly on the undoped silicate glass layer.
Claim 10
Independent Claim 118 words
A method of planarizing an inter-layer dielectric layer, including: forming a field effect transistor above a semiconductor substrate; depositing a metallic layer above the field effect transistor; depositing an undoped silicate glass layer directly on the semiconductor substrate and over the metallic layer using high density plasma chemical vapor deposition, so that the undoped silicate glass layer has a thickness over the semiconductor substrate in regions adjacent to the metallic layer that is greater than a thickness of the metallic layer, thereby forming only minor protrusions over the metallic layer; planarizing the undoped silicate glass layer using chemical-mechanical polishing to remove the minor protrusions; and depositing a doped silicate glass layer directly on the undoped silicate glass layer.
Claim 11
Dependent Claim 37 words
The method according to claim 8, wherein said depositing an undoped silicate glass layer includes depositing the undoped silicate glass layer to a thickness which is about 1000 Å greater than the thickness of the metallic layer.
Claim 12
Dependent Claim 34 words
The method according to claim 8, wherein said depositing an undoped silicate glass layer includes performing the density plasma chemical vapor deposition at an operating temperature between about 350° C. to about 450° C.
Claim 13
Dependent Claim 21 words
The method according to claim 8, wherein said planarizing the undoped silicate glass layer includes polishing for one minute or less.
Claim 14
Dependent Claim 27 words
The method according to claim 8, wherein said depositing a doped silicate glass layer includes forming the doped silicate glass layer using plasma enhanced chemical vapor deposition.

References Cited (Backward Citations)

US5554554A Cited
US5514616A Cited
US5686356A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-03-22 2002-09-21 2003-03-23 $2000.00 Window Closed / Lapsed
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