US5885877A
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Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric
Assignee: GlobalFoundries Inc
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Filing: 1997-04-21
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Granted: 1999-03-23
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Expires: 2017-04-21
Abstract
Abstract A composite gate electrode layer incorporates a diffusion-retarding barrier layer disposed at the bottom of the gate electrode layer to reduce the amount of dopant which diffuses into the gate dielectric layer from the gate electrode layer. A lower nitrogen-containing gate electrode layer provides a diffusion-retarding barrier layer against dopant diffusion into the gate dielectric layer disposed therebelow, and an upper gate electrode layer is formed upon the lower layer and is doped to form a highly conductive layer. Together the first and second gate electrode layers form a composite gate electrode layer which incorporates a diffusion-retarding barrier layer adjacent to the underlying gate dielectric layer. The barrier layer may be formed by annealing a first polysilicon layer in a nitrogen-containing ambient, such as N 2 , NO, N 2 O, and NH 3 , by implanting a nitrogen-containing material, such as elemental or molecular nitrogen, into a first polysilicon layer, and by in-situ depositing a nitrogen-doped first polysilicon layer. Diffusion of dopants into the gate dielectric layer may be retarded, as most dopant atoms are prevented from diffusing from the composite gate electrode layer at all. In addition, the nitrogen concentration within the gate dielectric layer, particularly at or near the substrate interface, may be maintained at lower concentrations than otherwise necessary to prevent dopant diffusion into the underlying substrate. The present invention is particularly well suited to thin gate dielectrics, such as a those having a thickness less than approximately 60 Å when using a p-type dopant, such as boron.
Inventors
- 👤 Mark I. Gardner
- 👤 Robert Dawson
- 👤 H. Jim Fulford, Jr.
- 👤 Frederick N. Hause
- 👤 Daniel Kadosh
- 👤 Mark W. Michael
- 👤 Bradley T. Moore
- 👤 Derick J. Wristers
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:08
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/60; H10D64/66; H10D64/661
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
101 words
In a semiconductor manufacturing process, a method of fabricating a gate electrode structure for an insulated gate field effect transistor (IGFET), said method comprising the steps of: providing a gate dielectric layer on an underlying semiconductor body; forming a nitrogen-containing first gate electrode layer on the gate dielectric layer; forming a second gate electrode layer on the first gate electrode layer, said first and second gate electrode layers together creating a composite gate electrode layer; introducing a dopant into at least the second gate electrode layer; and etching the composite gate electrode layer to form a gate electrode for the IGFET.
Claim 2
Dependent Claim
101 words
In a semiconductor manufacturing process, a method of fabricating a gate electrode structure for an insulated gate field effect transistor (IGFET), said method comprising the steps of: providing a gate dielectric layer on an underlying semiconductor body; forming a nitrogen-containing first gate electrode layer on the gate dielectric layer; forming a second gate electrode layer on the first gate electrode layer, said first and second gate electrode layers together creating a composite gate electrode layer; introducing a dopant into at least the second gate electrode layer; and etching the composite gate electrode layer to form a gate electrode for the IGFET.
Claim 3
Dependent Claim
21 words
A method as in claim 1 wherein the composite gate electrode layer etching step is performed before the dopant introducing step.
Claim 4
Dependent Claim
16 words
A method as in claim 1 wherein the first gate electrode layer comprises a polysilicon layer.
Claim 5
Dependent Claim
11 words
A method as in claim 1 wherein the dopant comprises boron.
Claim 6
Dependent Claim
31 words
A method as in claim 1 wherein the first gate electrode layer forming step comprises the steps of: depositing a first polysilicon layer; and implanting nitrogen into the first polysilicon layer.
Claim 7
Dependent Claim
33 words
A method as in claim 1 wherein the first gate electrode layer forming step comprises the steps of: depositing a first polysilicon layer; and annealing the first polysilicon layer in a nitrogen-containing ambient.
Claim 8
Dependent Claim
24 words
A method as in claim 1 wherein the first gate electrode layer forming step comprises the step of: in-situ depositing a nitrogen-doped polysilicon layer.
Claim 9
Dependent Claim
102 words
In a semiconductor manufacturing process, a method of fabricating a gate electrode structure for an insulated gate field effect transistor (IGFET), said method comprising the steps of: providing a gate dielectric layer on an underlying semiconductor body; depositing a first polysilicon layer on the gate dielectric layer; implanting a nitrogen-containing material into the first polysilicon layer; forming a second polysilicon layer on the first polysilicon layer, said first and second polysilicon layers together creating a composite polysilicon layer; introducing a dopant into at least the second polysilicon layer; and etching the composite polysilicon layer to form a gate electrode for the IGFET.
Claim 10
Dependent Claim
102 words
In a semiconductor manufacturing process, a method of fabricating a gate electrode structure for an insulated gate field effect transistor (IGFET), said method comprising the steps of: providing a gate dielectric layer on an underlying semiconductor body; depositing a first polysilicon layer on the gate dielectric layer; implanting a nitrogen-containing material into the first polysilicon layer; forming a second polysilicon layer on the first polysilicon layer, said first and second polysilicon layers together creating a composite polysilicon layer; introducing a dopant into at least the second polysilicon layer; and etching the composite polysilicon layer to form a gate electrode for the IGFET.
Claim 11
Dependent Claim
43 words
A method as in claim 8 wherein nitrogen introduced by the implanting step and disposed, as a result of subsequent processing steps, in the gate dielectric layer just below the first polysilicon layer has a concentration of less than approximately 2 atomic percent.
Claim 12
Dependent Claim
18 words
A method as in claim 9 wherein said nitrogen concentration just below the first polysilicon layer is negligible.
Claim 13
Dependent Claim
22 words
A method as in claim 8 wherein the first polysilicon layer is formed to a thickness between approximately 100 Åand 500 Å.
Claim 14
Dependent Claim
17 words
A method as in claim 11 wherein the etching step is performed before the dopant introducing step.
Claim 15
Dependent Claim
19 words
A method as in claim 8 further comprising the step of: annealing the nitrogen-containing material after the implanting step.
Claim 16
Dependent Claim
11 words
A method as in claim 8 wherein the dopant is boron.
Claim 17
Dependent Claim
102 words
In a semiconductor manufacturing process, a method of fabricating a gate electrode structure for an insulated gate field effect transistor (IGFET), said method comprising the steps of: providing a gate dielectric layer on an underlying semiconductor body; depositing a first polysilicon layer on the gate dielectric layer; annealing the first polysilicon layer in a nitrogen-containing ambient; forming a second polysilicon layer on the first polysilicon layer, said first and second polysilicon layers together creating a composite polysilicon layer; introducing a dopant into at least the second polysilicon layer; and etching the composite polysilicon layer to form a gate electrode for the IGFET.
Claim 18
Dependent Claim
102 words
In a semiconductor manufacturing process, a method of fabricating a gate electrode structure for an insulated gate field effect transistor (IGFET), said method comprising the steps of: providing a gate dielectric layer on an underlying semiconductor body; depositing a first polysilicon layer on the gate dielectric layer; annealing the first polysilicon layer in a nitrogen-containing ambient; forming a second polysilicon layer on the first polysilicon layer, said first and second polysilicon layers together creating a composite polysilicon layer; introducing a dopant into at least the second polysilicon layer; and etching the composite polysilicon layer to form a gate electrode for the IGFET.
Claim 19
Dependent Claim
43 words
A method as in claim 15 wherein nitrogen introduced by the annealing step and disposed, as a result of subsequent processing steps, in the gate dielectric layer just below the first polysilicon layer has a concentration of less than approximately 2 atomic percent.
Claim 20
Dependent Claim
18 words
A method as in claim 16 wherein said nitrogen concentration just below the first polysilicon layer is negligible.
Claim 21
Dependent Claim
28 words
A method as in claim 15 wherein the nitrogen-containing ambient is chosen from the group consisting of N 2 , NO, N 2 O, and NH 3 .
Claim 22
Dependent Claim
22 words
A method as in claim 15 wherein the first polysilicon layer is formed to a thickness between approximately 100 Åand 500 Å.
Claim 23
Dependent Claim
17 words
A method as in claim 19 wherein the etching step is performed before the dopant introducing step.
Claim 24
Dependent Claim
11 words
A method as in claim 15 wherein the dopant is boron.
Claim 25
Dependent Claim
96 words
In a semiconductor manufacturing process, a method of fabricating a gate electrode structure for an insulated gate field effect transistor (IGFET), said method comprising the steps of: providing a gate dielectric layer on an underlying semiconductor body; in situ depositing a nitrogen-doped first polysilicon layer on the gate dielectric layer; forming a second polysilicon layer on the first polysilicon layer, said first and second polysilicon layers together creating a composite polysilicon layer; introducing a dopant into at least the second polysilicon layer; and etching the composite polysilicon layer to form a gate electrode for the IGFET.
Claim 26
Dependent Claim
96 words
In a semiconductor manufacturing process, a method of fabricating a gate electrode structure for an insulated gate field effect transistor (IGFET), said method comprising the steps of: providing a gate dielectric layer on an underlying semiconductor body; in situ depositing a nitrogen-doped first polysilicon layer on the gate dielectric layer; forming a second polysilicon layer on the first polysilicon layer, said first and second polysilicon layers together creating a composite polysilicon layer; introducing a dopant into at least the second polysilicon layer; and etching the composite polysilicon layer to form a gate electrode for the IGFET.
Claim 27
Dependent Claim
44 words
A method as in claim 22 wherein nitrogen introduced by the in-situ depositing step and disposed, as a result of subsequent processing steps, in the gate dielectric layer just below the first polysilicon layer has a concentration of less than approximately 2 atomic percent.
Claim 28
Dependent Claim
18 words
A method as in claim 23 wherein said nitrogen concentration just below the first polysilicon layer is negligible.
Claim 29
Dependent Claim
22 words
A method as in claim 22 wherein the first polysilicon layer is formed to a thickness between approximately 100 Åand 500 Å.
Claim 30
Dependent Claim
17 words
A method as in claim 25 wherein the etching step is performed before the dopant introducing step.
Claim 31
Dependent Claim
11 words
A method as in claim 22 wherein the dopant is boron.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-22 | 2002-09-21 | 2003-03-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-22 | 2006-09-21 | 2007-03-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-22 | 2010-09-21 | 2011-03-23 | $7700.00 | Window Closed / Lapsed |