← Back to Patent Explorer
US5869903A Expired / Lapsed US ⏱️ 0.0 years remaining

Sealed semiconductor device including opposed substrates and metal wall

Assignee: Mitsubishi Electric Corp
•
Filing: 1997-01-31
•
Granted: 1999-02-09
•
Expires: 2017-01-31
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device includes a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate; bump wirings on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having one surface on which substrate wirings corresponding to the bump wirings are located, the wiring substrate being disposed on the circuit substrate so that the substrate wirings are electrically connected to the bump wirings, and in contact with the metal wall, sealing a region including the high-frequency circuit; and a second metal layer disposed on a second surface of the wiring substrate. An electromagnetic shielding effect sufficient for use in a high-frequency circuit is obtained and fabricating cost is considerably reduced.

Inventors

  • 👤 Mitsunori Nakatani
  • 👤 Hirofumi Nakano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 17:02
CPC Classifications
H; H10; H10W; H10W44/00; H10W44/20; H10W70/00; H10W70/60; H10W70/67; H10W70/688; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07232; H10W72/073; H10W72/07331; H10W72/07332; H10W72/20; H10W72/251; H10W72/30; H10W72/331; H10W72/851; H10W72/853; H10W72/856; H10W72/90; H10W72/921; H10W72/926; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734; H10W99/00

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 185 words
A semiconductor device comprising: a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate opposite the first surface; bump electrodes on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having a first surface on which substrate metallizations corresponding to the bump electrodes are located; a metal layer for adjusting differences in height between the bump electrodes and the metal wall, the metal layer being disposed between the bump electrodes and the wiring substrate metallizations, and between the metal wall and the wiring substrate, the wiring substrate being disposed opposite the circuit substrate so that the metallizations are electrically connected to the bump electrodes, the metal layer contacting the substrate metallizations and the metal wall, sealing a region including the high-frequency circuit; and a second metal layer disposed on a second surface of the wiring substrate opposite the first surface of the wiring substrate.
Claim 2
Dependent Claim 185 words
A semiconductor device comprising: a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate opposite the first surface; bump electrodes on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having a first surface on which substrate metallizations corresponding to the bump electrodes are located; a metal layer for adjusting differences in height between the bump electrodes and the metal wall, the metal layer being disposed between the bump electrodes and the wiring substrate metallizations, and between the metal wall and the wiring substrate, the wiring substrate being disposed opposite the circuit substrate so that the metallizations are electrically connected to the bump electrodes, the metal layer contacting the substrate metallizations and the metal wall, sealing a region including the high-frequency circuit; and a second metal layer disposed on a second surface of the wiring substrate opposite the first surface of the wiring substrate.
Claim 3
Dependent Claim 14 words
The semiconductor device of claim 1 wherein the wiring substrate is a TAB tape.
Claim 4
Dependent Claim 36 words
The semiconductor device of claim 1 wherein the substrate metallizations are connected to the bump electrodes through through-holes penetrating the wiring substrate, and including an insulating layer separating the second metal layer from the wiring substrate.
Claim 5
Dependent Claim 131 words
A semiconductor device comprising: a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate opposite the first surface; bump electrodes on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having a first surface on which substrate metallizations corresponding to and in contact with the bump electrodes are located; an insulating layer disposed between the metal wall and the wiring substrate, sealing a region including the high-frequency circuit; and a second metal layer disposed on a second surface of the wiring substrate opposite the first surface of the wiring substrate.
Claim 6
Dependent Claim 131 words
A semiconductor device comprising: a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate opposite the first surface; bump electrodes on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having a first surface on which substrate metallizations corresponding to and in contact with the bump electrodes are located; an insulating layer disposed between the metal wall and the wiring substrate, sealing a region including the high-frequency circuit; and a second metal layer disposed on a second surface of the wiring substrate opposite the first surface of the wiring substrate.
Claim 7
Dependent Claim 26 words
The semiconductor device of claim 1 wherein cavities sealed by the circuit substrate, the wiring substrate, and the metal wall are filled with an inert gas.
Claim 8
Dependent Claim 26 words
The semiconductor device of claim 1 wherein cavities sealed by the circuit substrate, the wiring substrate, and the metal wall are filled with an insulating resin.
Claim 9
Dependent Claim 167 words
A semiconductor device including: a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate opposite the first surface; bump electrodes on the first surface of the circuit surface and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having a first surface on which substrate metallizations corresponding to the bump electrodes are located, the wiring substrate being disposed opposite the circuit substrate so that the substrate metallizations are electrically connected to the bump electrodes, and contacting the metal wall, sealing a region including the high-frequency circuit; a second metal layer disposed on a second surface of the wiring substrate opposite the first surface of the wiring substrate; and a resin covering the second surface of the circuit substrate and outside surfaces of the metal wall and contacting the first surface of the wiring substrate.
Claim 10
Dependent Claim 167 words
A semiconductor device including: a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate opposite the first surface; bump electrodes on the first surface of the circuit surface and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having a first surface on which substrate metallizations corresponding to the bump electrodes are located, the wiring substrate being disposed opposite the circuit substrate so that the substrate metallizations are electrically connected to the bump electrodes, and contacting the metal wall, sealing a region including the high-frequency circuit; a second metal layer disposed on a second surface of the wiring substrate opposite the first surface of the wiring substrate; and a resin covering the second surface of the circuit substrate and outside surfaces of the metal wall and contacting the first surface of the wiring substrate.
Claim 11
Dependent Claim 14 words
The semiconductor device of claim 1 wherein the wiring substrate comprises a transparent material.
Claim 12
Dependent Claim 14 words
The semiconductor device of claim 1 wherein the wiring substrate is a printed board.
Claim 13
Dependent Claim 199 words
A semiconductor device comprising: a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate opposite the first surface; bump electrodes on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having a first surface on which substrate metallizations corresponding to the bump electrodes are located; a metal layer for adjusting differences in height between the bump electrodes and the metal wall, the metal layer being disposed between the bump electrodes and the wiring substrate metallizations, and between the metal wall and the wiring substrate, the wiring substrate being disposed opposite the circuit substrate so that the metallizations are electrically connected to the bump electrodes, the metal layer contacting the substrate metallizations and the metal wall, sealing a region including the high-frequency circuit; an insulating layer disposed on the second surface of the wiring substrate opposite the first surface of the wiring substrate and on the first metal layer; and a second metal layer disposed on the insulating layer.
Claim 14
Dependent Claim 199 words
A semiconductor device comprising: a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate opposite the first surface; bump electrodes on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having a first surface on which substrate metallizations corresponding to the bump electrodes are located; a metal layer for adjusting differences in height between the bump electrodes and the metal wall, the metal layer being disposed between the bump electrodes and the wiring substrate metallizations, and between the metal wall and the wiring substrate, the wiring substrate being disposed opposite the circuit substrate so that the metallizations are electrically connected to the bump electrodes, the metal layer contacting the substrate metallizations and the metal wall, sealing a region including the high-frequency circuit; an insulating layer disposed on the second surface of the wiring substrate opposite the first surface of the wiring substrate and on the first metal layer; and a second metal layer disposed on the insulating layer.

References Cited (Backward Citations)

JPH0349246A Cited
JPH03268340A Cited
US5175611A Cited
US5117068A Cited
US5408121A Cited
JPH06236903A Cited
US5451818A Cited
US5646445A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-02-08 2002-08-10 2003-02-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-02-08 2006-08-10 2007-02-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-02-08 2010-08-10 2011-02-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag